• Added Equation 1 to clarify ton, changed Equation 2 into IOUT(CCM-DCM), and added Equation 3 for calculating

IOUT(PFM-DCM) ................................................................................................................................................... 17

• Changed VOUT[7:0] to VSET[7:0]....................................................................................................................20

• Changed CONTROL1 into CONTROL2........................................................................................................... 23

• Added TPS6287xZ5 to Table 7-5, and changed VOUT[7:0] to VSET[7:0]....................................................... 23

• Added description for EN pin during UVLO......................................................................................................26

• Added Figure 7-12 ...........................................................................................................................................27

• Updated Table 7-7 by correcting the Vin condition in the 3rd row and adding a sub-row to explain that PG

goes low when VOUT > VT+(OVP) or VOUT < VT-(UVP) and DVS inactive...................................................27

• Added a description about device setting the PBUV or PBOV bits in case of an undervoltage or overvoltage

event, and changed description about the behavior of the PG during DVS..................................................... 27

• Added comment to explain that the common power-good signal must to have a pullup to a logic high level.. 30

• Updated description on initialization time interval, and clarified that functions I2C, output discharge, and

power good are available after completion of the device initialization..............................................................33

• Deleted the alternative I2C addresses from Table 7-10 ...................................................................................34

• Updated Figure 7-20 and Figure 7-21 (renamed Target Address into Device Address, and correct the number

of bits for Device Address from 8 to 7)............................................................................................................. 36

• Changed td(EN) to td(EN)2 .................................................................................................................................. 37

• Added (from 3.8A to 11.3A) to ΔIOUT in Table 9-1 ........................................................................................... 44

• Added clarification on IOUT in Equation 11 .......................................................................................................45

• Updated Equation 20 to recalculate the BWinner by using 406μF as max Cout value, and updated Equation 23

based on recalculated BWinner .........................................................................................................................48

• Changed value of optional CC2 from 1pF to 10pF............................................................................................ 48

• Added comment that all curves are obtained with L = 110nH (Coilcraft XGL4020-111ME) and fsw = 2.25MHz,

unless noted otherwise.....................................................................................................................................49

12 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most

current data available for the designated devices. This data is subject to change without notice and revision of

this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

TPS62870, TPS62871, TPS62872, TPS62873

SLVSGC5E – JANUARY 2023 – REVISED OCTOBER 2025

www.ti.com

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