SH7616 datasheet(43/935 Pages) RENESAS

43 / 935 page

Section 1 Overview

Rev. 2.00 Mar 09, 2006 page 17 of 906

REJ09B0292-0200

Type

Symbol

I/O

Name

Function

Bus control

CAS

Output

Column

address strobe

Synchronous DRAM CAS signal

Output

Output enable

EDO DRAM output enable signal

Used in access in RAS down mode

DQMUU/

WE3

Output

Highest byte

access

SRAM/synchronous DRAM highest byte

select signal

DQMUL/

WE2

Output

Second byte

access

SRAM/synchronous DRAM second byte

select signal

DQMLU/

WE1

Output

Third byte

access

SRAM/synchronous DRAM third byte

select signal

DQMLL/

WE0

Output

Lowest byte

access

SRAM/synchronous DRAM lowest byte

select signal

CAS3

Output

Column address

strobe 3

DRAM highest byte select signal

CAS2

Output

Column address

strobe 2

DRAM second byte select signal

CAS1

Output

Column address

strobe 1

DRAM third byte select signal

CAS0

Output

Column address

strobe 0

DRAM lowest byte select signal

CKE

Output

Clock enable

Synchronous DRAM clock enable signal

REFOUT

Output

Refresh out

Signal requesting refresh execution

when the bus is released

RD/

Output

Read/write

DRAM/synchronous DRAM write signal

BUSHiZ

Input

Bus high

impedance

Signal used in combination with WAIT

signal to place bus and strobe signals in

the high-impedance state without the

ending bus cycle

Output

Burst hint

Asserted at the start of a DMA burst,

negated one bus cycle before the end of

the burst

STATS0, 1

Output

Status

CPU, DMAC, and E-DMAC status

information

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