SH7616 datasheet(79/935 Pages) RENESAS

Part #	SH7616

Description	32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

PDF	935 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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79 / 935 page

Section 2 CPU

Rev. 2.00 Mar 09, 2006 page 53 of 906

REJ09B0292-0200

Addressing

Mode

Instruction

Format

Effective Addresses Calculation

Equation

Indirect register

addressing

with

displacement

@(disp:4,

Rn)

The effective address is Rn plus a 4-bit

displacement (disp). The value of disp is zero-

extended, and remains the same for a byte

operation, is doubled for a word operation, and is

quadrupled for a longword operation

1/2/4

disp

(zero-extended)

+ disp

× 1/2/4

Byte: Rn + disp

Word: Rn + disp

Longword: Rn +

disp

× 4

Indirect indexed

addressing

@(R0, Rn) The effective address is the Rn value plus R0

Rn + R0

Indirect GBR

addressing with

displacement

@(disp:8,

GBR)

The effective address is the GBR value plus an

8-bit displacement (disp). The value of disp is

zero-extended, and remains the same for a byte

operation, is doubled for a word operation, and

is quadrupled for a longword operation

GBR

1/2/4

disp

(zero-extended)

GBR

+ disp

× 1/2/4

Byte: GBR + disp

Word: GBR + disp

× 2

Longword: GBR +

disp

× 4

SH7616 Datasheet(PDF) 79 Page - Renesas Technology Corp

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