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SH7616 Datasheet(PDF) 20 Page - Renesas Technology Corp |
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SH7616 Datasheet(HTML) 20 Page - Renesas Technology Corp |
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20 / 935 page ![]() Rev. 2.00 Mar 09, 2006 page xx of xxvi 11.4.1 Example of DMA Data Transfer Between SCIF and External Memory.............. 516 11.5 Usage Notes ...................................................................................................................... 516 Section 12 16-Bit Free-Running Timer (FRT)............................................................ 519 12.1 Overview........................................................................................................................... 519 12.1.1 Features................................................................................................................ 519 12.1.2 Block Diagram..................................................................................................... 520 12.1.3 Pin Configuration................................................................................................. 521 12.1.4 Register Configuration......................................................................................... 521 12.2 Register Descriptions ........................................................................................................ 522 12.2.1 Free-Running Counter (FRC) .............................................................................. 522 12.2.2 Output Compare Registers A and B (OCRA and OCRB).................................... 522 12.2.3 Input Capture Register (FICR)............................................................................. 523 12.2.4 Timer Interrupt Enable Register (TIER) .............................................................. 523 12.2.5 Free-Running Timer Control/Status Register (FTCSR)....................................... 524 12.2.6 Timer Control Register (TCR)............................................................................. 526 12.2.7 Timer Output Compare Control Register (TOCR) .............................................. 527 12.3 CPU Interface.................................................................................................................... 528 12.4 Operation .......................................................................................................................... 531 12.4.1 FRC Count Timing .............................................................................................. 531 12.4.2 Output Timing for Output Compare .................................................................... 532 12.4.3 FRC Clear Timing................................................................................................ 532 12.4.4 Input Capture Input Timing ................................................................................. 533 12.4.5 Input Capture Flag (ICF) Setting Timing............................................................. 534 12.4.6 Output Compare Flag (OCFA, OCFB) Setting Timing ....................................... 534 12.4.7 Timer Overflow Flag (OVF) Setting Timing....................................................... 535 12.5 Interrupt Sources............................................................................................................... 536 12.6 Example of FRT Use......................................................................................................... 536 12.7 Usage Notes ...................................................................................................................... 537 12.7.1 Contention between FRC Write and Clear........................................................... 537 12.7.2 Contention between FRC Write and Increment ................................................... 538 12.7.3 Contention between OCR Write and Compare Match......................................... 539 12.7.4 Internal Clock Switching and Counter Operation ................................................ 540 12.7.5 Timer Output (FTOA, FTOB) ............................................................................. 541 Section 13 Watchdog Timer (WDT).............................................................................. 543 13.1 Overview........................................................................................................................... 543 13.1.1 Features................................................................................................................ 543 13.1.2 Block Diagram..................................................................................................... 544 13.1.3 Pin Configuration................................................................................................. 544 |
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