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SH7616 Datasheet(PDF) 27 Page - Renesas Technology Corp |
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SH7616 Datasheet(HTML) 27 Page - Renesas Technology Corp |
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27 / 935 page ![]() Section 1 Overview Rev. 2.00 Mar 09, 2006 page 1 of 906 REJ09B0292-0200 Section 1 Overview 1.1 Features of SuperH Microcomputer with On-Chip Ethernet Controller The SH7616 is a CMOS single-chip microcontroller that integrates a high-speed CPU core using an original Renesas architecture with supporting functions required for an Ethernet system. The CPU has a RISC (Reduced Instruction Set Computer) type instruction set. The CPU basically operates at a rate of one instruction per cycle, offering a great improvement in instruction execution speed. In addition, the 32-bit internal architecture provides improved data processing power, and DSP functions have also been enhanced with the implementation of extended Harvard architecture DSP data bus functions. With this CPU, it has become possible to assemble low-cost, high-performance/high-functionality systems even for applications such as realtime control, which could not previously be handled by microcontrollers because of their high-speed processing requirements. The SH7616 also includes a maximum 4-kbyte cache, for greater CPU processing power when accessing external memory. The SH7616 is equipped with a media access controller (MAC) conforming to the IEEE802.3u standard, and an Ethernet controller that includes a media independent interface (MII) standard unit, enabling 10/100 Mbps LAN connection. Supporting functions necessary for system configuration are also provided, including RAM, timers, a serial communication interface with FIFO (SCIF), interrupt controller (INTC), and I/O ports. To improve the efficiency of frame transmission/reception, the processing power of the DMAC for the Ethernet controller is improved and the FIFO for the DMAC has 2 kbytes. A CAM match signal input function is provided for systems that require multiple MAC addresses. In serial I/O with three channels, one operates with the FIFO for better data processing power when connected to the codec. |
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