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SH7616 Datasheet(PDF) 60 Page - Renesas Technology Corp |
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SH7616 Datasheet(HTML) 60 Page - Renesas Technology Corp |
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60 / 935 page ![]() Section 2 CPU Rev. 2.00 Mar 09, 2006 page 34 of 906 REJ09B0292-0200 Figure 2.2 shows the control registers. Table 2.1 indicates the SR register bits. ST I3 I2 I1 I0 RF1 RF0 Q M DMX DMY 0000 0000 RC 31 28 27 16 15 12 11 10 9 8 7 4 3 2 1 0 Status register (SR) Repeat start register (RS) Repeat end register (RE) Global base register (GBR) Vector base register (VBR) Modulo register (MOD) ME: Modulo end address MS: Modulo start address 31 31 31 31 31 0 0 0 0 0 16 15 RS RE GBR VBR ME MS Figure 2.2 Control Register Configuration |
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