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SH7616 Datasheet(PDF) 73 Page - Renesas Technology Corp |
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SH7616 Datasheet(HTML) 73 Page - Renesas Technology Corp |
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73 / 935 page ![]() Section 2 CPU Rev. 2.00 Mar 09, 2006 page 47 of 906 REJ09B0292-0200 Table 2.5 Destination Register Data Formats for DSP Instructions Guard Bits Register Bits Register Instruction 39–32 31–16 15–0 A0, A1 DSP operation Fixed decimal, PSHA, PMULS (Sign extend) 40-bit result Integer, PDMSB 24-bit result Clear to 0 Logic, PSHL Clear to 0 16-bit result Data transfer MOVS.W Sign extend MOVS.L 32-bit data A0G, A1G Data transfer MOVS.W Data Not updated Not updated MOVS.L X0, X1, Y0, Y1, M0, M1 DSP operation Fixed decimal, PSHA, PMULS — 32-bit result Integer, logic, PDMSB, PSHL 16-bit result Clear to 0 Data transfer MOVX.W, MOVY.W, MOVS.W MOVS.L 32-bit data |
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