SH7616 datasheet(91/935 Pages) RENESAS

Part #	SH7616

Description	32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

PDF	935 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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91 / 935 page

Section 2 CPU

Rev. 2.00 Mar 09, 2006 page 65 of 906

REJ09B0292-0200

Instruction Formats

Source Operand

Destination

Operand

Example

d format

dddd

xxxx

dddd

dddddddd

: Indirect

GBR with

displacement

R0 (Direct register) MOV.L

@(disp,GBR),R0

R0(Direct register) dddddddd: Indirect

GBR with

displacement

MOV.L

R0,@(disp,GBR)

dddddddd: PC

relative with

displacement

R0 (Direct register) MOVA

@(disp,PC),R0

dddddddd

: PC

relative

—

label

d12 format

dddd

xxxx

dddd

dddddddddddd

PC relative

—

BRA

label

(label=disp+PC)

nd8 format

dddd

nnnn

xxxx

dddd

dddddddd: PC

relative with

displacement

nnnn

: Direct

MOV.L

@(disp,PC),Rn

i format

iiiiiiii:

Immediate

Indirect indexed

GBR

AND.B

#imm,@(R0,GBR)

i i i i

xxxx

i i i i

iiiiiiii

Immediate

R0 (Direct register) AND

#imm,R0

iiiiiiii:

Immediate

—

TRAPA #imm

ni format

nnnn

i i i i

xxxx

i i i i

iiiiiiii

Immediate

nnnn

: Direct

ADD

#imm,Rn

Note: * In multiply/accumulate instructions, nnnn is the source register.

SH7616 Datasheet(PDF) 91 Page - Renesas Technology Corp

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