| Electronic Components Datasheet Search |
|
SH7616 Datasheet(PDF) 81 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
SH7616 Datasheet(HTML) 81 Page - Renesas Technology Corp |
|
81 / 935 page ![]() Section 2 CPU Rev. 2.00 Mar 09, 2006 page 55 of 906 REJ09B0292-0200 PC relative addressing disp:8 The effective address is the PC value sign-extended with an 8-bit displacement (disp), doubled, and added to the PC value PC 2 + × disp (sign-extended) PC + disp × 2 PC + disp × 2 disp:12 The effective address is the PC value sign-extended with a 12-bit displacement (disp), doubled, and added to the PC value PC 2 + × disp (sign-extended) PC + disp × 2 PC + disp × 2 Rn The effective address is the register PC value plus Rn PC Rn + PC + Rn PC + Rn Immediate addressing #imm:8 The 8-bit immediate data (imm) for the TST, AND, OR, and XOR instructions are zero-extended — #imm:8 The 8-bit immediate data (imm) for the MOV, ADD, and CMP/EQ instructions are sign-extended — #imm:8 The 8-bit immediate data (imm) for the TRAPA instruction is zero-extended and is quadrupled — |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |