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SH7727 Datasheet(PDF) 139 Page - Renesas Technology Corp |
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SH7727 Datasheet(HTML) 139 Page - Renesas Technology Corp |
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139 / 1109 page ![]() Section 2 CPU Rev. 5.00 Dec 12, 2005 page 67 of 1034 REJ09B0254-0500 Type Kinds of Instruction Op Code Function Number of Instructions 15 CLRT T bit clear 75 CLRMAC MAC register clear System control instructions CLRS S bit clear LDC Load into control register LDS Load into system register LDTLB PTEH/PTEL load into TLB NOP No operation PREF Data prefetch to cache RTE Return from exception handling SETS S bit setting SETT T bit setting SLEEP Transition to power-down mode STC Store from control register STS Store from system register TRAPA Trap exception handling Total: 68 189 |
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