SH7727 datasheet(147/1109 Pages) RENESAS

Part #	SH7727

Description	Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

PDF	1109 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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147 / 1109 page

Section 2 CPU

Rev. 5.00 Dec 12, 2005 page 75 of 1034

REJ09B0254-0500

Branch Instructions

Table 2.24 Branch Instructions

Instruction

Operation

Code

Privileged

Mode

Cycles

T Bit

label

If T

= 0, disp × 2 + PC → PC;

if T

= 1, nop (where label is

disp + PC)

10001011dddddddd

—3/1*

—

BF/S

label

Delayed branch, if T

= 0,

disp

× 2 + PC → PC;

if T

= 1, nop

10001111dddddddd

—2/1*

—

label

Delayed branch, if T

= 1,

disp

× 2 + PC → PC;

if T

= 0, nop

10001001dddddddd

—3/1*

—

BT/S

label

If T

= 1, disp × 2 + PC → PC;

if T

= 0, nop

10001101dddddddd

—2/1*

—

BRA

label

Delayed branch,

disp

× 2 + PC → PC

1010dddddddddddd

—2

—

BRAF

Delayed branch,

Rm + PC

→ PC

0000mmmm00100011

—2

—

BSR

label

Delayed branch, PC

→ PR,

disp

× 2 + PC → PC

1011dddddddddddd

—2

—

BSRF

Delayed branch, PC

→ PR,

Rm + PC

→ PC

0000mmmm00000011

—2

—

JMP

@Rm

Delayed branch, Rm

→ PC

0100mmmm00101011

—2

—

JSR

@Rm

Delayed branch, PC

→ PR,

→ PC

0100mmmm00001011

—2

—

RTS

Delayed branch, PR

→ PC

0000000000001011

—2

—

Note: * One state when the branch is not executed.

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