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7702 Datasheet(PDF) 56 Page - Renesas Technology Corp |
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7702 Datasheet(HTML) 56 Page - Renesas Technology Corp |
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56 / 217 page ![]() INPUT/OUTPUT PINS 3–2 7702/7703 Group User’s Manual This chapter describes the programmable I/O ports in the single-chip mode. For P0 to P4, which change their functions according to the processor mode, refer also to the section “2.5 Processor modes” and “Chapter 12. CONNECTION WITH EXTERNAL DEVICES.” P42 and P5 to P8 also function as the I/O pins of the internal peripheral devices. For the functions, refer to the section “3.2 I/O pins of internal peripheral devices” and relevant sections of each internal peripheral devices. 7703 Group The 7703 Group varies with the 7702 Group in the number of pins, pins’ assignment and others. Refer to the section “Chapter 20. 7703 GROUP.” 3.1 Programmable I/O ports The 7702 Group has 68 programmable I/O ports, P0 to P8. The programmable I/O ports have direction registers and port registers in the SFR area. Figure 3.1.1 shows the memory map of direction registers and port registers. Fig. 3.1.1 Memory map of direction registers and port registers 3.1 Programmable I/O ports Port P4 register Port P5 register Port P4 direction register Port P5 direction register Port P6 register Port P7 register Port P6 direction register Port P7 direction register Port P8 register Port P8 direction register 816 916 A16 B16 C16 D16 E16 F16 1016 1116 1216 1316 1416 Addresses Port P0 register Port P1 register Port P0 direction register Port P1 direction register Port P2 register Port P3 register Port P2 direction register Port P3 direction register 216 316 416 516 616 716 |
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