7702 datasheet(7/217 Pages) RENESAS

7 / 217 page

Table of Contents

7702/7703 Group User’s Manual

Table of Contents

CHAPTER 1. DESCRIPTION

1.1 Performance overview .......................................................................................................... 1-3

1.2 Pin configuration ................................................................................................................... 1-4

1.3 Pin description ...................................................................................................................... 1-6

1.3.1 Example for processing unused pins .......................................................................... 1-9

1.4 Block diagram ...................................................................................................................... 1-12

CHAPTER 2. CENTRAL PROCESSING UNIT (CPU)

2.1 Central processing unit ....................................................................................................... 2-2

2.1.1 Accumulator (Acc) ......................................................................................................... 2-3

2.1.2 Index register X (X) ....................................................................................................... 2-3

2.1.3 Index register Y (Y) ....................................................................................................... 2-3

2.1.4 Stack pointer (S) ............................................................................................................ 2-4

2.1.5 Program counter (PC) ................................................................................................... 2-5

2.1.6 Program bank register (PG) ......................................................................................... 2-5

2.1.7 Data bank register (DT) ................................................................................................ 2-6

2.1.8 Direct page register (DPR) ........................................................................................... 2-6

2.1.9 Processor status register (PS) ..................................................................................... 2-8

2.2 Bus interface unit ............................................................................................................... 2-10

2.2.1 Overview ....................................................................................................................... 2-10

2.2.2 Functions of bus interface unit (BIU) ........................................................................ 2-12

2.2.3 Operation of bus interface unit (BIU)........................................................................ 2-14

2.3 Access space ....................................................................................................................... 2-16

2.3.1 Banks ............................................................................................................................ 2-17

2.3.2 Direct page ................................................................................................................... 2-17

2.4 Memory assignment ........................................................................................................... 2-18

2.4.1 Memory assignment in internal area ......................................................................... 2-18

2.5 Processor modes ................................................................................................................ 2-21

2.5.1 Single-chip mode ......................................................................................................... 2-22

2.5.2 Memory expansion and microprocessor modes ....................................................... 2-22

2.5.3 Setting processor modes ............................................................................................ 2-25

[Precautions when selecting processor mode]................................................................... 2-27

CHAPTER 3. INPUT/OUTPUT PINS

3.1 Programmable I/O ports ...................................................................................................... 3-2

3.1.1 Direction register ............................................................................................................ 3-3

3.1.2 Port register .................................................................................................................... 3-4

3.2 I/O pins of internal peripheral devices ............................................................................ 3-8

CHAPTER 4. INTERRUPTS

4.1 Overview .................................................................................................................................. 4-2

4.2 Interrupt sources ................................................................................................................... 4-4

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