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7702 Datasheet(PDF) 21 Page - Renesas Technology Corp |
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7702 Datasheet(HTML) 21 Page - Renesas Technology Corp |
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21 / 217 page ![]() DESCRIPTION 7702/7703 Group User’s Manual 1–7 Table 1.3.2 Pin description (2) 1.3 Pin description Functions [Single-chip mode] Port P0 is an 8-bit CMOS I/O port. This port has an I/O direction register and each pin can be programmed for input or output. [Memory expansion mode] [Microprocessor mode] Low-order 8 bits (A0–A7) of the address are output. [Single-chip mode] Port P1 is an 8-bit I/O port with the same function as P0. [Memory expansion mode] [Microprocessor mode] qExternal bus width = 8 bits (When the BYTE pin is “H” level) Middle-order 8 bits (A8–A15) of the address are output. qExternal bus width = 16 bits (When the BYTE pin is “L” level) Data (D8 to D15) input/output and output of the middle- order 8 bits (A8–A15) of the address are performed with the time sharing system. [Single-chip mode] Port P2 is an 8-bit I/O port with the same function as P0. [Memory expansion mode] [Microprocessor mode] Data (D0 to D7) input/output and output of the high- order 8 bits (A16–A23) of the address are performed with the time sharing system. [Single-chip mode] Port P3 is a 4-bit I/O port with the same function as P0. [Memory expansion mode] [Microprocessor mode] __ ____ _____ P30–P33 respectively output R/W, BHE, ALE, and HLDA signals. __ qR/W The Read/Write signal indicates the data bus state. The state is read while this signal is “H” level, and write while this signal is “L” level. ____ qBHE “L” level is output when an odd-numbered address is accessed. qALE This is used to obtain only the address from address and data multiplex signals. _____ qHLDA This is the signal to externally indicate the state when the microcomputer is in Hold state. “L” level is output during Hold state. Input/Output I/O Output I/O I/O I/O Output Pin P00–P07 A0–A7 P10–P17 A8/D8– A15/D15 P20–P27 A16/D0– A23/D7 P30–P33 V __ R/W, ____ BHE, ALE, _____ HLDA V _____ U : The 7703 Group does not have the P33/HLDA pin. Name I/O port P0 I/O port P1 I/O port P2 I/O port P3 |
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