HC210 datasheet(201/228 Pages) ALTERA

201 / 228 page

Altera Corporation

8–13

September 2008

Preliminary

External Memory Interface Support

External

Memory

Interface

Support

Like Stratix II devices, HardCopy II I/O pins have dedicated phase-shift

circuitry for interfacing with external memory, including DDR and DDR2

SDRAM, QDR II SRAM, RLDRAM II, and SDR SDRAM. A compensated

delay element on each DQS pin automatically aligns input DQS

synchronization signals with the data window of their corresponding DQ

data signals.

For all HardCopy II devices, the top I/O banks (3 and 4) support DQ and

DQS signals with DQ bus modes that vary from ×4, ×8/×9, ×16/×18 and

up to ×32/×36. The top bank has a phase-shifting reference circuit that

controls the compensated delay elements for all DQS pins on the top

bank.

For the HC230 and HC240 HardCopy II devices, the bottom I/O banks (7

and 8) also support DQ and DQS signals with DQ bus modes from ×4,

×8/×9, ×16/×18 and ×32/×36. Similar to the top banks, the bottom I/O

banks of these devices also have a phase-shifting reference circuit to

control the delay elements at the bottom DQS pins.

Table 8–8 shows the number of DQ and DQS buses supported per

companion device pair. (3)

Table 8–8. DQ and DQS Bus Mode support for Stratix II and HardCopy II Companion Devices (Part 1 of 2)

Note (1)

Stratix II and

HardCopy II

Companion Devices

Package

Number of ×4

Groups

Number of

×8/×9 Groups

Number of

×16/×18

Groups

Number of

×32/×36

Groups

EP2S30

HC210 (2)

484-pin FineLine BGA

EP2S60

HC210 (2)

484-pin FineLine BGA

EP2S90

HC210 (2)

484-pin FineLine BGA

EP2S60

HC220 (2)

672-pin FineLine BGA

EP2S90

HC220 (2)

780-pin FineLine BGA

EP2S130

HC220 (2)

780-pin FineLine BGA

EP2S90

HC230 (3)

1,020-pin FineLine BGA

EP2S130

HC230 (3)

1,020-pin FineLine BGA

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