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W97AH6KB Datasheet(PDF) 112 Page - Winbond

Part # W97AH6KB
Description  Four-bit prefetch DDR architecture
PDF  127 Pages
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Manufacturer  WINBOND [Winbond]
Direct Link  http://www.winbond.com
Logo WINBOND - Winbond

W97AH6KB Datasheet(HTML) 112 Page - Winbond

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W97AH6KB / W97AH2KB
Publication Release Date: May 15, 2014
Revision: A01-001
- 112 -
VTT + 2x Y mV
VTT + Y mV
VTT - Y mV
VTT - 2x Y mV
VTT
Actual waveform
tLZ(DQS), tLZ(DQ)
tHZ(DQS), tHZ(DQ)
VOH - X mV
VOH - 2x X mV
VOL + 2x X mV
VOL + X mV
VTT
VOH
VOL
2x Y
2x X
X
T1T2
T1 T2
Y
Stop driving point = 2 x T1
– T2
begin driving point = 2 x T1
– T2
Figure of HSUL_12 Driver Output Reference Load for Timing and Slew Rate
The parameters tLZ(DQS), tLZ(DQ), tHZ(DQS), and tHZ(DQ) are defined as single-ended. The timing parameters tRPRE
and tRPST are determined from the differential signal DQS_t-DQS_c.
13. Measured from the start driving of DQS_t - DQS_c to the start driving the first rising strobe edge.
14. Measured from the from start driving the last falling strobe edge to the stop driving DQS_t , DQS_c.
15. tDQSCKDS is the absolute value of the difference between any two tDQSCK measurements (within a byte lane) within a contiguous sequence
of bursts within a 160nS rolling window. tDQSCKDS is not tested and is guaranteed by design. Temperature drift in the system is < 10°C/s.
Values do not include clock jitter.
16. tDQSCKDM is the absolute value of the difference between any two tDQSCK measurements (within a byte lane) within a 1.6µS rolling window.
tDQSCKDM is not tested and is guaranteed by design. Temperature drift in the system is < 10°C/s. Values do not include clock jitter.
17. tDQSCKDL is the absolute value of the difference between any two tDQSCK measurements (within a byte lane) within a 32mS rolling window.
tDQSCKDL is not tested and is guaranteed by design. Temperature drift in the system is < 10°C/s. Values do not include clock jitter.



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