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8101 Datasheet(PDF) 148 Page - LSI Computer Systems

Part # 8101
Description  Gigabit Ethernet Controller
PDF  172 Pages
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Manufacturer  LSI [LSI Computer Systems]
Direct Link  http://www.lsicsi.com
Logo LSI - LSI Computer Systems

8101 Datasheet(HTML) 148 Page - LSI Computer Systems

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6-4
Specifications
Copyright © 2000–2001 by LSI Logic Corporation. All rights reserved.
Note:
Refer to Figure 6.1 for timing diagram.
Figure 6.1
Input Clock Timing
Table 6.2
Input Clock Timing Characteristics
Symbol
Parameter
Limit
Unit
Conditions
Min
Typ
Max
t1
SCLK cycle time
1/33
1/66
1 MHz
t2
SCLK duty cycle
40
60
%
t3
TCLK period
7.9992
8
8.0008
ns
t4
TCLK HIGH time
3.6
4.4
ns
t5
TCLK LOW time
3.6
4.4
ns
t6
TCLK to TBC delay
0
8
ns
t7
REGCLK cycle time
1/5
1/40
1 MHz
t8
REGCLK duty cycle
40
60
%
SCLK
TCLK
TBC
REGCLK
System
Interface
t1
t2
t2
t3
t4
t5
t6
t7
t8
t8
10-Bit PHY
Interface
Register
Interface



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