AD9213 datasheet(38/110 Pages) AD

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AD9213

Data Sheet

Rev. A | Page 38 of 110

DDC NCO Description

The DDC contains one NCO. The NCO enables the frequency

translation process by creating a complex exponential frequency

(e−jωct) that can be mixed with the input spectrum to translate

the desired frequency band of interest to dc, where it can be

filtered by the subsequent low-pass filter blocks to prevent

aliasing.

When placed in variable IF mode, the NCO supports two

different additional modes: DDC NCO programmable modulus

mode and DDC NCO coherent mode.

DDC NCO Programmable Modulus Mode

This mode supports >48-bit frequency tuning accuracy for

applications that require exact rational (M/N) frequency

synthesis at a single carrier frequency, where M is the integer

representing the rational numerator of the frequency ratio, and

N is the integer representing the rational denominator of the

frequency ratio.

In this mode, the NCO is set up by providing the following

words:



48-bit, frequency tuning word (FTW)



48-bit, Modulus A word (MAW)



48-bit, Modulus B word (MBW)



48-bit, phase offset word (POW)

DDC NCO Coherent Mode

This mode allows an infinite number of frequency hops where the

phase is referenced to a single synchronization event at Time 0.

This mode is useful when phase coherency must be maintained

when switching between different frequency bands. In this mode,

the user can switch to any tuning frequency without the need to

reset the NCO. Although only one FTW is required, the NCO

contains 16 shadow registers for fast-switching applications.

Selection of the shadow registers is controlled by the CMOS

general-purpose input/output (GPIO) pins or through the

providing the following words:



Up to 16 48-bit FTWs



Up to 16 48-bit POWs



The 48-bit MAW must be set to zero in coherent mode

Figure 95 shows a block diagram of one NCO and its

connection to the rest of the design. The coherent phase

accumulator block contains the logic that allows an infinite

number of frequency hops.

NCO

COS/SIN

GENERATOR

NCO CHANNEL

SELECTION

SYSREF

TRIGGER

DIGITAL

QUADRATURE

MIXER

FTW = FREQUENCY TUNING WORD

POW = PHASE OFFSET WORD

MAW = MODULUS A WORD (NUMERATOR)

MBW = MODULUS B WORD (DENOMINATOR)

COHERENT

PHASE

ACCUMULATOR

BLOCK

48-BIT

MAW/MBW

MODULUS

ERROR

NCO

CHANNEL

SELECTION

CIRCUITS

REAL INPUT

DECIMATION

FILTERS

MAW/MBW

FTW/POW

WRITE INDEX

48-BIT

FTW/POW

48-BIT

FTW/POW

48-BIT

FTW/POW

MAP

SYNCHRONIZATION

CONTROL CIRCUITS

Figure 95. NCO and Mixer Block Diagram

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