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AD9213 Datasheet(PDF) 12 Page - Analog Devices |
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AD9213 Datasheet(HTML) 12 Page - Analog Devices |
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12 / 110 page  AD9213 Data Sheet Rev. A | Page 12 of 110 Pin No. Ball Mnemonic Ball Type Signal Type Description D3, E3, E10, E11, F3, J12, K12, L12, N14, P12, P13 RES_DNC Not applicable Not applicable Reserved. Do not connect. D4, D5, D10, D11 JVTT Supply Not applicable JESD204B Output Driver Termination Voltage, 1 V Supply. D6 to D9 JVDD Supply Not applicable JESD204B Digital Circuitry Supply, 1 V Supply. D12 JVDD2 Supply Not applicable 2 V Supply for JESD204B. D13, D14 SERDOUT_P[9], SERDOUT_N[9] Output JESD204B Lane 9 Differential Pair. E4 TIE_LOW Input CMOS Internal Use Only. Connect to ground. E5 to E9, F4 to F6, F9, F10 DGND Ground Not applicable Digital Ground. E12, F2 SVDD2 Supply Not applicable 2 V Supply for Digital Input/Output and SPI. F1, G1 SYNCINB_P, SYNCINB_N Input Not applicable JESD204B Synchronization. When low, the JESD204B interface handshakes with the receiver. This pin goes high when handshake is complete. F7, F8, G5 to G10 DVDD Supply Not applicable 1 V Supply for Digital Core. F11, G13 AVSSFS8 Ground Not applicable Ground for AVSSFS8 Supply Domain. Connect to ground. F12 SCLK Input Not applicable Main SPI Clock Pin. F13 CSB Input Not applicable Chip Select Pin for SPI. F14, G14 SYSREF_N, SYSREF_P Input/output LVDS/CML Differential Synchronization Signal. Critical timing relative to CLK_x. This pin is placed near CLK_x inputs and establishes deterministic latency. This pin is internally tied to ground through 50 Ω in default configuration and can be left floating if set to Subclass 0 mode via Register 0x525. G2 TMU_REFP Input Static TMU Reference Supply. Connect this pin to a clean, 1.8 V reference supply on the board that is ≤TMU_AVDD2. G3, H3 TDN, TDP Static Temperature Diode Cathode/Anode. This pin can be left floating if unused. G4 TMU_DVDD1 Supply Not applicable Temperature Measurement Unit (TMU) Digital Domain Supply. G11 AVDDFS8 Supply Not applicable 1 V Supply for Clocks with fS/8 Energy. G12 SDIO Input/output Not applicable Main SPI Input/Output Pin. H1 FD Output CMOS Fast Detect Pin. H2 TMU_REFN Input Static TMU Reference Supply. Connect to clean ground on board. H4, H11 VSS_MOAT Ground Not applicable Ground for Isolation Guard Ring. Connect to ground. H5 to H10, J14, K2 to K11, L6 to L11, M6, M9, M13, M14, N4, N6, N9, N12, N13, P1, P6, P9, P11, P14 AGND Ground Not applicable Ground for ADC. H12, J3 to J11, J13 AVDD Supply Analog Core 1 V Supply for ADC. H13, H14 TRIG_P, TRIG_N Input LVDS Trigger Input for Frequency Hopping. This pin is internally tied to ground through 50 Ω in default configuration and can be left floating if disabled by default with Register 0x602. J1, J2 VDD_NVG Supply 1 V supply for onboard Negative Voltage Generator (NVG). K1 VNEG_OUT Output Internally Generated −1 V Output. K13, L13 CLKVDD_LF Supply 1 V Supply for Clock Buffer. K14, L14 CLK_N, CLK_P Input RF Clock Inputs, High Frequency. L1, L2 VSS_NVG Ground Supply Voltage (VSS) for NVG. L3 TMU_AVDD2 Supply TMU 2 V Analog Supply. L4 RVDD2 Supply TOP_REF 2 V Supply. |
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