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AD9213 Datasheet(PDF) 80 Page - Analog Devices

Part # AD9213
Description  12-Bit, 6 GSPS/10.25 GSPS, JESD204B, RF Analog-to-Digital Converter
PDF  110 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9213 Datasheet(HTML) 80 Page - Analog Devices

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AD9213
Data Sheet
Rev. A | Page 80 of 110
Address
Register Name
Bits
Bit Name
Settings
Description
Default
Access
0x515
JTX_LID5_CFG
[7:5]
Reserved
Reserved.
0x0
R
[4:0]
JTX_LID5_CFG
JESD204B Serial LID Number for Lane 5.
0x5
R/W
0x516
JTX_LID6_CFG
[7:5]
Reserved
Reserved.
0x0
R
[4:0]
JTX_LID6_CFG
JESD204B Serial LID Number for Lane 6.
0x6
R/W
0x517
JTX_LID7_CFG
[7:5]
Reserved
Reserved.
0x0
R
[4:0]
JTX_LID7_CFG
JESD204B Serial LID Number for Lane 7.
0x7
R/W
0x518
JTX_LID8_CFG
[7:5]
Reserved
Reserved.
0x0
R
[4:0]
JTX_LID8_CFG
JESD204B Serial LID Number for Lane 8.
0x8
R/W
0x519
JTX_LID9_CFG
[7:5]
Reserved
Reserved.
0x0
R
[4:0]
JTX_LID9_CFG
JESD204B Serial LID Number for Lane 9.
0x9
R/W
0x51A
JTX_LID10_CFG
[7:5]
Reserved
Reserved.
0x0
R
[4:0]
JTX_LID10_CFG
JESD204B Serial LID Number for Lane 10.
0xA
R/W
0x51B
JTX_LID11_CFG
[7:5]
Reserved
Reserved.
0x0
R
[4:0]
JTX_LID11_CFG
JESD204B Serial LID Number for Lane 11.
0xB
R/W
0x51C
JTX_LID12_CFG
[7:5]
Reserved
Reserved.
0x0
R
[4:0]
JTX_LID12_CFG
JESD204B Serial LID Number for Lane 12.
0xC
R/W
0x51D
JTX_LID13_CFG
[7:5]
Reserved
Reserved.
0x0
R
[4:0]
JTX_LID13_CFG
JESD204B Serial LID Number for Lane 13.
0xD
R/W
0x51E
JTX_LID14_CFG
[7:5]
Reserved
Reserved.
0x0
R
[4:0]
JTX_LID14_CFG
JESD204B Serial LID Number for Lane 14.
0xE
R/W
0x51F
JTX_LID15_CFG
[7:5]
Reserved
Reserved.
0x0
R
[4:0]
JTX_LID15_CFG
JESD204B Serial LID Number for Lane 15.
0xF
R/W
0x520
JTX_SCR_L_CFG
7
JTX_SCR_CFG
JESD204B Serial Scrambler Mode
(SCR = JTX_SCR_CFG).
0x1
R/W
0 JESD204B scrambler disabled (SCR = 0).
1 JESD204B scrambler enabled (SCR = 1).
[6:5]
Reserved
Reserved.
0x0
R
[4:0]
JTX_L_CFG
JESD204B Serial Lane Control (L = JTX_L_
CFG + 1).
0xF
R/W
0x0 One lane per link (L = 1).
0x1 Two lanes per link (L = 2).
0x2 Three lanes per link (L = 3).
0x3 Four lanes per link (L = 4).
0x5 Six lanes per link (L = 6).
0x7 Eight lanes per link (L = 8).
0xB Twelve lanes per link (L = 12).
0xF Sixteen lanes per link (L = 16).
0x521
JTX_F_CFG
[7:0]
JTX_F_CFG
JESD204B Number of Octets per Frame
(F = JTX_F_CFG + 1).
0x1
R/W
0000 F = 1.
0001 F = 2.
0011 F = 4.
0x522
JTX_K_CFG
[7:5]
Reserved
Reserved.
0x0
R
[4:0]
JTX_K_CFG
JESD204B Number of Frames per Multiframe
(K = JTX_K_CFG + 1).
0x1F
R/W
0x523
JTX_M_CFG
[7:0]
JTX_M_CFG
JESD204B Number of Converters per Link
(M = JTX_M_CFG).
0x0
R/W
000 Link connected to one virtual converter
(M = 1).
001 Link connected to two virtual converters
(M = 2).
0x524
JTX_CS_N_CFG
[7:6]
JTX_CS_CFG
JESD204B Number of Control bits per
Sample.
0x3
R/W
00 No control bits (CS = 0).
01 One control bit (CS = 1), Control Bit 2 only.
10 Two control bits (CS = 2), Control Bit 2 and
Control Bit 1 only.
11 Three control bits (CS = 3), all control bits
(Control Bit 2, Control Bit 1, and Control Bit 0).
5
Reserved
Reserved.
0x0
R



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