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Data Sheet

AD9213

Rev. A | Page 41 of 110

GPIO Level Control Mode

The GPIO[x] pins determine the exact NCO channel selected.

The following procedure must be followed to use GPIO level

control for NCO channel selection:

Configure one or more GPIO[x] pins as an NCO channel

selection input. GPIO[x] pins that are not configured as

NCO channel selection are internally tied low.

To use the GPIO[x] pin(s), write to Register 0x1606,

Bits[3:0] to select the corresponding GPIO profile.

Configure the NCO channel selector in GPIO level control

mode by setting Register 0x632, Bits[7:4] to 0x1 through

0x5, depending on the desired GPIO[x] pin ordering.

Select the desired NCO channel via the GPIO[x] pins.

GPIO Edge Control Mode

Low to high transition on the GPIO[x] pin determines the exact

NCO channel selected. The internal channel selection counter

is reset by either SYSREF_x signal or the DDC soft reset.

The following procedure must be followed to use GPIO edge

control for NCO channel selection:

Configure one or more GPIO[x] pins as NCO channel

selection inputs.

To use the GPIO[x] pin(s), write to Register 0x1606,

Bits[3:0] to select the corresponding GPIO profile.

Configure the NCO channel selector in GPIO edge control

mode by setting Bits[7:4] in the NCO control register

(Register 0x632 to 0x8 through 0xB, depending on the

desired GPIO[x] pin.

Configure the wrap point for the NCO channel selection

by setting Bits[3:0] in Register 0x632. A value of 4 causes

the channel selection to wrap at Channel 4 (0, 1, 2, 3, 4, 0,

1, 2, 3, 4, and so on).

Transition the selected GPIO[x] pin from low to high to

increment the NCO channel selection.

Profile Select Timer Mode

A 32-bit profile select timer (PST) determines the exact NCO

channel selected. The channel selection counter is reset by DDC

soft reset.

The following procedure must be followed to use profile select

timer control for NCO channel selection.

Configure the NCO channel selector in profile select timer

mode by setting Bits[7:4] in Register 0x632 to 0xC.

Configure the profile select timer by setting Register 0x65F

through Register 0x664. The unit of the profile select timer

is encode clock.

Configure the wrap point for the NCO channel selection

by setting Bits[3:0] in Register 0x632. A value of 4 causes

the channel selection to wrap at Channel 4 (0, 1, 2, 3, 4, 0,

1, 2, 3, 4, and so on).

The profile select timer specifies the number of sample

clock cycles between frequency hops. The NCO channel

increments when the profile select timer expires.

NCO channel selection is controlled directly through the

fS/2

NCO CHANNEL 0

CARRIER FREQUENCY 0

(ACTIVE)

NCO CHANNEL 1

CARRIER FREQUENCY 1

(STANDBY)

NCO CHANNEL 2

CARRIER FREQUENCY 2

(STANDBY)

ACTIVE

DDC

Figure 97. NCO Coherent Mode with Three NCO Channels (B0 Selected)

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