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AD9213 Datasheet(PDF) 13 Page - Analog Devices |
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AD9213 Datasheet(HTML) 13 Page - Analog Devices |
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13 / 110 page ![]() Data Sheet AD9213 Rev. A | Page 13 of 110 Pin No. Ball Mnemonic Ball Type Signal Type Description L5 BVDD3 Supply Internally Generated 3 V Supply for Input Buffer. Bypass with 10 μF and 0.1 μF capacitors to GND. M1, M2, M3, N2, P2 GPIO[4], GPIO[2], GPIO[3], GPIO[1], GPIO[0] Input/output General-Purpose Input/Output Pins. These pins can be left floating in default configuration. M4 BVNN2 Supply Not applicable Internally Generated −2 V Supply for Input Buffer. Bypass with 10 μF and 0.1 μF capacitors to GND. M5, N5, P5 BVNN1 Supply Not applicable −1 V Supply for Input Buffer. M7, M8, N7, N8 VOID Not applicable Not applicable No Balls at These Locations. M10, N10, P10 BVDD2 Supply Not applicable 2 V supply for Input Buffer. M11 FVDD Supply Not applicable 1 V Supply for Reference ADC (REF_ADC). M12 PLLVDD2 Supply Not applicable 2.0 V LDO Supply. N1 RSTB Input Not applicable Chip Reset, Active Low. N3 VREF Input Static Optional VREF Import. N11 PDWN Input CMOS Powerdown/Standby Mode Control. P3 VCM Output Static Export VCM. P4 AVNN1 Supply Not applicable −1 V Supply for TOP_REF. P7, P8 VIN_P, VIN_N Input RF ADC Inputs, High Frequency. |
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