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AD9213 Datasheet(PDF) 52 Page - Analog Devices |
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AD9213 Datasheet(HTML) 52 Page - Analog Devices |
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52 / 110 page  AD9213 Data Sheet Rev. A | Page 52 of 110 Chip Decimation Ratio (DCM) DDC Output Type Bandwidth Per DDC1 No. of Virtual Converters Required Register Settings Real 0.8333% × fS 1 Register 0x606 = 0x21. One DDC; I only selected. Register 0x607 = 0x0D. Chip decimate by 48. Register 0x630 = 0x12. 6 dB gain, variable IF, real output. Register 0x631 = 0x0C. HB5 + HB4 + HB3 + HB2 + TB2 + HB1 filters. Register 0x634 to Register 0x63F = FTW and POW set as required by application for DDC. 96 Complex 0.8333% × fS 2 Register 0x606 = 0x01. One DDC, I/Q selected. Register 0x607 = 0x0E Chip decimate by 96. Register 0x630 = 0x02. 6 dB gain, variable IF, complex output.) Register 0x631 = 0x0C. HB5 + HB4 + HB3 + HB2 + TB2 + HB1 filters. Register 0x634 to Register 0x63F = FTW and POW set as required by application for DDC. 1 fS is the ADC sample rate. |
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