Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

TW2864D Datasheet(PDF) 44 Page - Renesas Technology Corp

Part # TW2864D
Description  4-Channel Video Decoders and Audio Codecs For Security Applications
PDF  110 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

TW2864D Datasheet(HTML) 44 Page - Renesas Technology Corp

Back Button TW2864D Datasheet HTML 40Page - Renesas Technology Corp TW2864D Datasheet HTML 41Page - Renesas Technology Corp TW2864D Datasheet HTML 42Page - Renesas Technology Corp TW2864D Datasheet HTML 43Page - Renesas Technology Corp TW2864D Datasheet HTML 44Page - Renesas Technology Corp TW2864D Datasheet HTML 45Page - Renesas Technology Corp TW2864D Datasheet HTML 46Page - Renesas Technology Corp TW2864D Datasheet HTML 47Page - Renesas Technology Corp TW2864D Datasheet HTML 48Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 44 / 110 page
background image
TW2864
FN7745 Rev. 0.00
Page 44 of 110
September 28, 2012
AUDIO CLOCK SLAVE MODE DATA OUTPUT TIMING
TW2864 always outputs ASYNR/ADATR/ADATM by ACLKR falling edge triggered timing.
ADATR/ADATM output data are always changing at next ACLKR falling edge triggered timing after ASYNR signal
changes. If ASYNR is output, ADATR/ADATM outputs are always fixed to one ACLKR falling edge timing. However, if
ASYNR is input, ADATR/ADATM output timing changes by ASYNR input timing.
ASYNR is ACLKR Falling Edge Triggered Input/Output
If ASYNR is input and ASYNR input is ACLKR falling edge triggered input as ASYNR input signal is changing after
ACLKR falling edge,or if ASYNR is output, TW2864 output ADATR/ADATM by ACLKR falling edge triggered timing, as
shown in the following figures. ASYNR signal is changing during ACLKR = 0.TW2864 output ADATR/ADATM data after
next ACLKR falling edge triggered timing with more than half ACLKR clock delay.
MSB
LSB
MSB
LSB
MSB
1/fs
ASYNR
ACLKR
ADATR
Data 1
Data 2
FIGURE 27. ACLKMASTER=0,RM_SYNC=0
MSB
LSB MSB
LSB
MSB
1/fs
ASYNR
ACLKR
ADATR
Data 1
Data 2
FIGURE 28. ACLKMASTER=0,RM_SYNC=1



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com