 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
TW2864D Datasheet(PDF) 49 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
TW2864D Datasheet(HTML) 49 Page - Renesas Technology Corp |
|
|
49 / 110 page  TW2864 FN7745 Rev. 0.00 Page 49 of 110 September 28, 2012 Host Interface Serial Interface The two wire serial bus interface is used to allow an external micro-controller to write to or read from the data through the TW2864 register. The SCLK is the serial clock and SDAT is the data line. Both lines are pulled high by the resistors connected to VDD. The SADD[1:0] defines two LSB of the slave device address by tying the SADD pins either to VDD or GND. SLAVE ADDRESS R/W 0 1 0 1 0 SADD[1] SADD[0] 1 = Read 0 = Write The TW2864 supports auto index increments in write/read mode if the data are in sequential order. Data transfer rate on the bus is up to 400 Kbits/s. MSB LSB MSB LSB MSB LSB Start Slave address R/WB Ack Index Ack Data Ack Stop SDAT SCLK (a) Write Mode MSB LSB MSB LSB Start Slave address R/WB Ack Index Ack Stop SDAT SCLK MSB LSB MSB LSB Start Slave address R/WB Ack Data NoAck Stop “0” “1” (b) Read Mode FIGURE 36. TIMING CHART OF SERIAL INTERFACE |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
