TW2864D datasheet(84/110 Pages) RENESAS

84 / 110 page

TW2864

FN7745 Rev. 0.00

Page 84 of 110

September 28, 2012

Index

Master Control

[7]

[6]

[5]

[4]

[3]

[2]

[1]

[0]

0xDB

ADACEN

AADCEN PB_MASTER PB_LRSEL PB_SYNC RM_8BIT ASYNROEN

ACLKRMASTER

ADACEN

Audio DAC Function mode

Audio DAC function disable(test purpose only)

Audio DAC function enable(default)

AADCEN

Audio ADC Function mode

Audio ADC function disable(test purpose only)

Audio ADC function enable(default)

PB_MASTER

Define the operation mode of the ACLKP and ASYNP pin for playback.

All type I2S/DSP Slave mode(ACLKP and ASYNP is input) (default)

TW2864 type I2S/DSP Master mode (ACLKP and ASYNP is output)

PB_LRSEL

Select audio data to be used for playback input.

If PB_SYNC=0 I2S format,

0: 1st Left channel audio data (default), 1: 1st Right channel audio data.

If PB_SYNC=1 DSP format,

0 1st input audio data.

1: 2nd input audio data

PB_SYNC

Define the digital serial audio data format for playback audio on the ACLKP, ASYNP and ADATP

pin.

I2S format (default)

DSP format

RM_8BIT

Define output data format per one word unit on ADATR pin.

16bit one word unit output(default)

8bit one word unit packed output

ASYNROEN

Define input/output mode on the ASYNR pin.

ASYNR pin is input(default)

ASYNR pin is output

ACLKRMASTER

Define input/output mode on the ACLKR pin and set up audio 256xfs system processing.

ACLKR

input.External

256xfs

clock

should

connected

ACLKR pin.(default)

ACLKR pin is output. Internal ACKG generates 256xfs clock.

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