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TW2864D Datasheet(PDF) 26 Page - Renesas Technology Corp

Part # TW2864D
Description  4-Channel Video Decoders and Audio Codecs For Security Applications
PDF  110 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

TW2864D Datasheet(HTML) 26 Page - Renesas Technology Corp

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TW2864
FN7745 Rev. 0.00
Page 26 of 110
September 28, 2012
FOUR CHANNEL D1 TIME-DIVISION-MULTIPLEXED FORMAT WITH 108MHZ
Four channel of D1 (720x480) at 27MHz video stream that are time-division-multiplexed at 108MHz data rate
format is implemented in TW2864 for security surveillance application. In order to reduce pin counts (thus
shrink chip size) on both decoder’s digital output port and the input port of the back end compression Codec
devices, TW2864 implements single 8 bit bus at 4 times the base band pixel clock rate of 27MHz. While
quadrupling the data rate on a single bus to meet the new requirement, individually, each channel data
arrangement still retains the base band 27MHz ITU-R BT.656 specification. For interface that can accept the
new 108MHz clock bus, only one single clock at 108MHz is required. Embedded timing (SAV-EAV) code and
Channel ID are inserted into each channel for de-multiplexing and separation of channel data.
Figure 12 depicts the temporal arrangement of the video data in 108MHz data rate. Each channel is byte level time-
division multiplexed (TDM). Main clock is 108MHz clock.
TABLE 5. SPECIAL FORMAT OF ITU-R BT. 656 EMBEDDED TIMING CODE AND CHANNEL ID CODE
CONDITION
656 FVH VALUE
SAV-EAV CODE
FIELD
V-TIME
H-TIME
F
V
H
FIRST
SECOND
THIRD
FOURTH
CH1
CH2
CH3
CH4
EVEN
BLANK
EAV
1
1
1
0xFF
0x00
0x00
0xF0
0xF1
0xF2
0xF3
EVEN
BLANK
SAV
1
1
0
0xFF
0x00
0x00
0xE0
0xE1
0xE2
0xE3
EVEN
ACTIVE
EAV
1
0
1
0xFF
0x00
0x00
0xD0
0xD1
0xD2
0xD3
EVEN
ACTIVE
SAV
1
0
0
0xFF
0x00
0x00
0xC0
0xC1
0xC2
0xC3
ODD
BLANK
EAV
0
1
1
0xFF
0x00
0x00
0xB0
0xB1
0xB2
0xB3
ODD
BLANK
SAV
0
1
0
0xFF
0x00
0x00
0xA0
0xA1
0xA2
0xA3
ODD
ACTIVE
EAV
0
0
1
0xFF
0x00
0x00
0x90
0x91
0x92
0x93
ODD
ACTIVE
SAV
0
0
0
0xFF
0x00
0x00
0x80
0x81
0x82
0x83
Ch4
Ch3
Ch2
Ch1
Legend
Y10
Cr6
FF
Cb0
Cr1
0
Y6
00
Y0
Y11
Cb8
00
Cr0
Cb12
Y7
XY
Y1
Y12
Cr8
Cb0
Cb2
4 Mux Data
108MHz
Clock
FIGURE 12. TIMING DIAGRAM OF 108MHZ 4 CH D1 TIME-DIVISION-MULTIPLEXED VIDEO DATA



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