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TW2864D Datasheet(PDF) 91 Page - Renesas Technology Corp |
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TW2864D Datasheet(HTML) 91 Page - Renesas Technology Corp |
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91 / 110 page ![]() TW2864 FN7745 Rev. 0.00 Page 91 of 110 September 28, 2012 [REV_ID=0 TW2864] Index Audio Clock Control [7] [6] [5] [4] [3] [2] [1] [0] 0xF8 0 APZ APG 0 ACPL SRPH LRPH [REV_ID>=1 TW2864] Index Audio Clock Control [7] [6] [5] [4] [3] [2] [1] [0] 0xF8 APZ APG 0 ACPL SRPH LRPH APZ These bits control Loop in ACKG block. 1 is default APG These bits control Loop in ACKG block. [REV_ID=0 TW2864] 2 is default [REV_ID>=1 TW2864] 4 is default ACPL These bits control Loop closed/open in ACKG block. 0 Loop closed(default) 1 Loop open(recommended on most application case) SRPH Reserved. 0 (default) LRPH Reserved. 0 (default) |
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