TW2864D datasheet(51/110 Pages) RENESAS

51 / 110 page

TW2864

FN7745 Rev. 0.00

Page 51 of 110

September 28, 2012

Single Channel Clock-In Mode

[REV_ID>=1 TW2864 only]

If TEST pin is 1 and ALINKI pin is 0, TW2864 works under CLKI pin Single Channel Clock-In mode. In this mode, if

FC27 register is 1, a 27MHz clock needs to be connected to the CLKI pin; if FC27 register is 0, a 29.5MHz clock for

PAL-SQ or 24.543MHz clock for NTSC-SQ needs to be connected to the CLKI pin. Also, SADD[1:0]=0/2/3 values are

available for Serial Interface Slave Address. If Audio function is used with FC27=0 squared pixel mode, ACKI register

equation is as follows.

ACKI = round (Faudio/CLKI input clock Frequency * 2^23 )

TW2864

TEST

SADD[1]

CLKI

ALINKI

27MHz for ITU-R656

29.5MHz for PAL-SQ

24.543MHz for NTSC-SQ

GND

SADD[0]

VDD

VD1[7:0]

VD2[7:0]

VD3[7:0]

VD4[7:0]

Single Channel

Video Output only

CLKNO

CLKPO

CLKI input clock

path through

SADD[1:0]=0,2,3 : available

SADD[1:0]=1 : not available

FIGURE 38. SINGLE CHANNEL CLOCK-IN MODE

Squared Pixel Mode Operation

If FC27 register bit is set to 0, TW2864 works under Squared Pixel mode operation. If Single Channel Clock-In mode is

not selected, CLKI pin input on PAL-SQ mode should have either 118MHz(=29.5MHzx4) for TW2864A/TW2864C or

59MHz(=29.5MHzx2) for TW2864B/TW2864D. Also,CLKI pin input on NTSC-SQ mode should have either

98.172MHz(=24.543MHzx4) for TW2864A/TW2864C or 49.086MHz(=24.543MHzx2) for TW2864B/TW2864D. If

Single Channel Clock-In mode is selected (REV_ID>=1 TW2864 only), CLKI pin input should have either 29.5MHz for

PAL-SQ or 24.543MHz for NTSC-SQ. HACTIVE register value should be 0x300 (768dec) for PAL-SQ and 0x280

(640dec) for NTSC-SQ. If Audio function is used with this Squared Pixel mode, ACKI register equations are as follows.

ACKI = round ( F audio / 29.5MHz * 2^23 )………………for PAL-SQ

ACKI = round ( F audio / 24.543MHz * 2^23 )……………for NTSC-SQ

TW2864D Datasheet(PDF) 51 Page - Renesas Technology Corp

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