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XC2000 Datasheet(PDF) 114 Page - Infineon Technologies AG

Part # XC2000
Description  16/32-Bit Single-Chip Microcontroller with 32-Bit Performance Volume 1 (of 2): Peripheral Units
PDF  647 Pages
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

XC2000 Datasheet(HTML) 114 Page - Infineon Technologies AG

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XC2000 Derivatives
System Units (Vol. 1 of 2)
Memory Organization
Preliminary
User’s Manual
3-52
V1.0, 2007-06
MemoryX2K, V1.1
3.10.2
Register Interface
The “IMB Registers” on Page 3-52 describes the special function registers of the IMB.
In “System Control Registers” on Page 3-63 the special function registers that
influence the IMB but are not allocated to the IMB address range are described.
3.10.2.1
IMB Registers
The section describes all IMB special function registers.
IMB Control
Global IMB control.
Both IMB_IMBCTRL and IMB_IMBCTRH are reset by an Application Reset.
The write access to both registers is controlled by the register security mechanism as
defined in the SCU chapter “Register Control” on Page 6-181. Please note that the
register write-protection is not activated automatically again after an access to
IMB_IMBCTR because this happens only for SCU internal registers.
Table 3-7
Registers Overview
Register Short
Name
Register Long Name
Offset
Address
Page Number
IMB_IMBCTRL
IMB Control Low
FF FF00H
Page 3-52
IMB_IMBCTRH
IMB Control High
FF FF02H
Page 3-54
IMB_INTCTR
Interrupt Control
FF FF04H
Page 3-55
IMB_FSR_BUSY
Flash State Busy
FF FF06H
Page 3-57
IMB_FSR_OP
Flash State Operations
FF FF08H
Page 3-57
IMB_FSR_PROT
Flash State Protection
FF FF0AH
Page 3-59
IMB_MAR
Margin
FF FF0CH Page 3-61
IMB_PROCON0
Protection Configuration 0
FF FF10H
Page 3-62
IMB_PROCON1
Protection Configuration 1
FF FF12H
Page 3-62
IMB_PROCON2
Protection Configuration 2
FF FF14H
Page 3-62
IMB_IMBCTRL
IMB Control Low
ISFR (FF FF00H)
Reset value: 558CH
15
14
13
12
11
10
9
8765
432
10
DDF
DCF
---
----
-
DLC
PF
WSFLASH
rw
rw
---
----
-
rw
rw



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