XC2000 datasheet(115/647 Pages) INFINEON

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XC2000 Derivatives

System Units (Vol. 1 of 2)

Memory Organization

Preliminary

User’s Manual

3-53

V1.0, 2007-06

MemoryX2K, V1.1

Field

Bits

Typ Description

WSFLASH

[2:0]

Wait States for Flash Access

Number of wait cycles after which the IMB expects

read data from the flash memory.

This field determines as well the read timing of the

PSRAM in the flash emulation address range. See

“Flash Emulation” on Page 3-12.

Note: WSFLASH must not be 0. This value is

forbidden!

DLCPF

Disable Linear Code Pre-Fetch

“High Speed Mode”: When the next read

request will be delivered from the buffer and so

the flash memory would be idle, the IMB Core

autonomously increments the last address

and reads the next 128-bit block from the flash

memory.

“Low Power Mode”: This feature is disabled.

Usually for code with power minimization

requirements or for code with short linear code

sections this feature should be disabled (DLCPF =

1). Enabling this feature is only advantageous for

code section with longer linear sequences. With

lower values of WSFLASH the performance gain of

DLCPF=0 is reduced. In case of low WSFLASH

settings DLCPF=1 might even lead to better

performance than with linear code pre-fetch.

DCF

[13:12] rw

Disable Code Fetch from Flash Memory

“01”: Short notation DCF = 1. If RPA = 1 instructions

cannot be fetched from flash memory. If RPA

= 0 this field has no effect.

“10”: Short notation DCF = 0. Instructions can be

fetched independent of RPA.

“00” | “11”: Illegal state. Has the same effect as “01”.

This state can only be left by an Application

Reset.

During startup or test mode or when RPA = 0

software can change this field to any value.

Otherwise code fetch can only be disabled but not

enabled anymore until the next Application Reset.

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