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XC2000 Datasheet(PDF) 121 Page - Infineon Technologies AG |
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XC2000 Datasheet(HTML) 121 Page - Infineon Technologies AG |
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121 / 647 page  XC2000 Derivatives System Units (Vol. 1 of 2) Memory Organization Preliminary User’s Manual 3-59 V1.0, 2007-06 MemoryX2K, V1.1 OPER 5 rh Operation Error The IMB Core maintains internal bits that are set when starting a program or erase process. They are cleared when this process finishes. These bits are not reset by an Application Reset but only by a System Reset. If one of these bits is set after Application Reset the IMB Core sets OPER. So this signals that a running erase or program process was interrupted by an Application Reset. The OPER is cleared by “Reset to Read”, “Clear Status” or a System Reset. IMB_FSR_PROT Flash State Protection ISFR (FF FF0AH) Reset value: x000H 15 14 13 12 11 10 9 8765 432 10 RPRO – – DDB ER DSB ER IDBE R ISBE R ––– PRO ER WPR ODIS RPR ODIS PROI NER PROI N rh –– rh rh rh rh ––– rh rh rh rh rh Field Bits Typ Description PROIN 0 rh Flash Protection Installed Modified by the IMB Core. Cleared by Application Reset. PROINER 1 rh Flash Protection Installation Error Modified by the IMB Core. Cleared by Application Reset. RPRODIS 2 rh Read Protection Disabled The read protection was temporarily disabled with the “Disable Read Protection” command. Modified by the IMB Core. Cleared by Application Reset. WPRODIS 3 rh Write Protection Disabled The write protection was temporarily disabled with the “Disable Write Protection” command. Modified by the IMB Core. Cleared by Application Reset. Field Bits Typ Description |
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