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HD6433713 Datasheet(PDF) 121 Page - Renesas Technology Corp |
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HD6433713 Datasheet(HTML) 121 Page - Renesas Technology Corp |
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121 / 324 page ![]() 7.1.3 MOS Pull-Down Ports 4, 5, 6, and 7, which are high-voltage I/O ports, can be designated by mask option as having or not having MOS pull-down resistors for their (PMOS open-drain) outputs. (This does not apply to ZTAT™ versions.) Figure 7-2 shows the MOS pull-down circuit configuration. When the “with MOS pull-down” option is chosen, the source of the MOS pull-down is connected to the Vdisp power supply. Accordingly, the mask option making pin P17/Vdisp a Vdisp power supply pin must also be chosen. Figure 7-2 MOS Pull-Down Circuit Configuration VCC Vdisp PDR Input data STBY * Input control Note: * Dotted lines indicate mask option. 110 |
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