HD6433713 datasheet(257/324 Pages) RENESAS

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14.3.2 HD6433712, HD6433713 and HD6433714 AC Characteristics

Table 14-9 gives the control signal timing of the HD6433712, HD6433713 and HD6433714.

Table 14-10 gives the serial interface timing.

Table 14-9 Control Signal Timing

Conditions: Unless otherwise indicated, VCC = 4.0 to 5.5 V, Vdisp = VCC – 40 to VCC,

VSS = 0.0 V, Ta = –20 to +75°C

Rating

Item

Symbol

Test Conditions

Min

Typ

Max

Unit

fOSC

—

8.4

MHz

VCC = 2.7 to 5.5 V

—

4.2

Clock cycle time

tCYC

119

—

500

VCC = 2.7 to 5.5 V

238

—

500

238

—

1000

VCC = 2.7 to 5.5 V

476

—

1000

Subclock pulse

X1, X2

VCC = 2.5 to 5.5 V

—

32.768 —

kHz

generator

frequency

Subclock cycle

tsubcyc

X1, X2

VCC = 2.5 to 5.5 V

—

30.5

—

µs

time

Subactive

SUB

VCC = 2.5 to 5.5 V

—

244.14 —

µs

instruction cycle

time

trc

——

VCC = 2.7 to 5.5 V

—

trc

——

VCC = 2.7 to 5.5 V

—

Oscillator

trc

X1, X2

VCC = 2.7 to 5.5 V

—

settling time

tCPH

OSC1

—

VCC = 2.7 to 5.5 V

100

—

tCPL

OSC1

—

VCC = 2.7 to 5.5 V

100

—

tCPr

OSC1

——

VCC = 2.7 to 5.5 V

—

tCPf

OSC1

——

VCC = 2.7 to 5.5 V

—

Applicable

Pins

Reference

Diagram

Figure

14-1

Figure

14-1

Clock pulse

generator

frequency

Instruction cycle

time

Oscillator settling

time (crystal

oscillator)

Oscillator settling

time (ceramic

oscillator)

External clock

pulse width (high)

External clock

pulse width (low)

External clock

rise time

External clock fall

time

OSC1,

OSC2,

OSC1,

OSC2,

OSC1,

OSC2,

OSC1,

OSC2,

246

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