XRT72L13 datasheet(29/370 Pages) EXAR

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XRT72L13

M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC

PRELIMINARY

REV. P1.0.6

TxDS1Data_26/

TxHDLCData_6

Transmit DS1/E1 Data Input - Channel 26/Transmit HDLC Control-

ler Block Input - Bit 6:

The function of this output pin depends upon whether the XRT72L13

is operating in the "Multiplexer/De-Multiplexer" Mode or in the "High

Speed HDLC Controller" Mode.

Transmit DS1/E1 Data Input - Channel 26 (Multiplexer/De-Multi-

plexer Mode):

This input pin accepts either a DS1 or E1 signal from the Terminal

Equipment. This input pin is sampled upon the "falling edge" of the

TxDS1Clk_26 signal.

Transmit HDLC Controller Block Input - Bit 6: (High Speed HDLC

Controller Mode)

This input pin, along with TxHDLC_Data[0:5] and TxHDLC_Data_7

function as the "Transmit HDLC Controller Byte input interface. Data

that resides on this bus, during the rising edge of "TxHDLCClk" is

latched into the "Transmit HDLC Controller Block" and will be encap-

sulated into a HDLC frame and transmitted to the remote terminal

equipment.

TxDS1Clk_26/

SEND_FCS

Transmit DS1/E1 Clock Input - Channel 26/SEND_FCS Request

Input pin:

The function of this output pin depends upon whether the XRT72L13

is operating in the "Multiplexer/De-Multiplexer" Mode or in the "High

Speed HDLC Controller" Mode.

Transmit DS1/E1 Clock Input - Channel 26 (Multiplexer/De-Multi-

plexer Mode):

This input pin accepts either a DS1 (1.544MHz) or an E1 (2.048MHz)

clock signal from the Terminal Equipment. The falling edge of this sig-

nal is used to sample the data at the "TxDS1Data_26" input pin.

SendFCS Request Input (High Speed HDLC Controller Mode)

Setting this input pin "HIGH, at the end of enter data to be transported

over the DS3 transport medium via an out-bound HDLC frame, com-

mands the Transmit HDLC Controller to compute FCS value (e.g.,

either a CRC-16 or CRC-32 value) and append it to the outbound

HDLC frame.

TxDS1Data_25/

TxHDLCData_5

Transmit DS1/E1 Data Input - Channel 25/Transmit HDLC Control-

ler Block Input - Bit 5:

The funtion of this output pin depends upon whether the XRT72L13 is

operating in the "Multiplexer/De-Multiplexer" Mode or in the "High

Speed HDLC Controller" Mode.

Transmit DS1/E1 Data Input - Channel 25 (Multiplexer/De-Multi-

plexer Mode):

This input pin accepts either a DS1 or E1 signal from the Terminal

Equipment. This input pin is sampled upon the "falling edge" of the

TxDS1Clk_25 signal.

Transmit HDLC Controller Block Input - Bit 5: (High Speed HDLC

Controller Mode)

This input pin, along with TxHDLC_Data[0:4] and TxHDLC_Data[6:7]

function as the "Transmit HDLC Controller Byte input interface. Data

that resides on this bus, during the rising edge of "TxHDLCClk" is

latched into the "Transmit HDLC Controller Block" and will be encap-

sulated into a HDLC frame and transmitted to the remote terminal

equipment.

GND

****

Ground Pin

PIN DESCRIPTIONS

PIN #NAME

TYPE

DESCRIPTION

XRT72L13 Datasheet(PDF) 29 Page - Exar Corporation

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