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XRT72L13 Datasheet(PDF) 95 Page - Exar Corporation |
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XRT72L13 Datasheet(HTML) 95 Page - Exar Corporation |
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95 / 370 page  áç áç áç áç M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC XRT72L13 PRELIMINARY REV. 1.0.6 83 2.3.2.2 Operating Mode Register Bit 7 - Local Loop-back Mode This bit-field permits the user to configure the XRT72L13 M13 device to operate in the “Local Loop- back” Mode. Setting this bit-field to “1” configures the XRT72L13 M13 chip to operate in the “Local Loopback” Mode. Setting this bit-field to “0” configures the XRT72L13 M13 chip to not operate in the “Local Loopback” Mode. Bit 6 - Line Loopback Mode This bit-field permits the user to configure the XRT72L13 M13 device to operate in the “Line Loop- back” Mode. Setting this bit-field to “1” configures the XRT72L13 M13 chip to operate in the “Line Loopback” Mode. Setting this bit-field to “0” configures the XRT72L13 M13 chip to not operate in the “Line Loopback” Mode. Bit 5 - Internal LOS Enable This “Read/Write” bit-field permits the user to config- ure the XRT72L13 M13 chip to either declare an LOS (Loss of Signal) condition, based upon the “Internal Circuit’s” criteria or not. Setting this bit-field to “0” configures the XRT72L13 M13 chip to NOT declare an LOS condition, based upon its own internal criteria. 0xA5 DS2 Framer Interrupt Register - 2 RUR 0x00 0xA6 DS2 Framer Interrupt Status Register - 2 R/O 0x00 0xA7 DS2 Framer Interrupt Enable Register - 3 R/W 0x00 0xA8 DS2 Framer Interrupt Register - 3 RUR 0x00 0xA9 DS2 Framer Interrupt Status Register - 3 R/O 0x00 0xAA DS2 Framer Interrupt Enable Register - 4 R/W 0x00 0xAB DS2 Framer Interrupt Register - 4 RUR 0x00 0xAC DS2 Framer Interrupt Status Register - 4 R/O 0x00 0xAD DS2 Framer Interrupt Enable Register - 5 R/W 0x00 0xAE DS2 Framer Interrupt Register - 5 RUR 0x00 0xAF DS2 Framer Interrupt Status Register - 5 R/O 0x00 0xB0 DS2 Framer Interrupt Enable Register - 6 R/W 0x00 0xB1 DS2 Framer Interrupt Register - 6 RUR 0x00 0xB2 DS2 Framer Interrupt Status Register - 6 R/O 0x00 0xB3 DS2 Framer Interrupt Enable Register - 7 R/W 0x00 0xB4 DS2 Framer Interrupt Register - 7 RUR 0x00 0xB5 DS2 Framer Interrupt Status Register - 7 R/O 0x00 0xB6 - 0xFF Reserved 0x100 - 0x157 Transmit LAPD Message Buffer (PMDL Messages) R/W 0x158 Receive LAPD Message Buffer (PMDL Messages) R/O TABLE 4: REGISTER ADDRESS MAP ADDRESS REGISTER NAME TYPE DEFAULT VALUE OPERATING MODE REGISTER (ADDRESS = 0X00) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 Local Loop- back Mode Line Loop- back Mode Internal LOS Enable RESET Interrupt Enable RESET Frame Format TimRefSel[1:0] R/W R/W R/W R/W R/W R/W R/W R/W 0 0101 011 |
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