XRT72L13 datasheet(75/370 Pages) EXAR

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M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC

XRT72L13

PRELIMINARY

REV. 1.0.6

2.1

THE MICROPROCESSOR INTERFACE BLOCK SIG-

NAL

The Framer IC may be configured into a wide variety

of different operating modes and have its perfor-

mance monitored by software through a standard (lo-

cal "housekeeping") microprocessor, using data, ad-

dress and control signals.

The local µP configures the Framer IC (into a desired

operating mode) by writing data into specific address-

able, on-chip "Read/Write" registers; or on-chip RAM.

The microprocessor interface provides the signals

which are required for a general purpose micropro-

cessor to read or write data into these registers. The

Microprocessor Interface also supports "polled" and

interrupt driven environments. These interface sig-

nals are described below in Table 1, 2, and 3. The

microprocessor interface can be configured to oper-

ate in the "Motorola" Mode or in the "Intel" mode.

When the Microprocessor Interface is operating in the

"Motorola" mode, then some of the control signals

function in a manner as required by the Motorola

68000 family of microprocessors. Likewise, when the

Microprocessor Interface is operating in the "Intel"

Mode, then some of these Control Signals function in

a manner as required by the Intel 80xx family of mi-

croprocessors.

Table 1 lists and describes those Microprocessor In-

terface signals whose role is constant across the two

modes. Table 2 describes the role of some of these

signals when the Microprocessor Interface is operat-

ing in the Intel Mode. Likewise, Table 3 describes the

role of these signals when the Microprocessor Inter-

face is operating in the Motorola Mode.

FIGURE 33. SIMPLE BLOCK DIAGRAM OF THE MICROPROCESSOR INTERFACE BLOCK, WITHIN THE FRAMER IC

A[8:0]

WrB_RW

RdB_DS

ALE_AS

Reset

Int

D[7:0]

MOTO

Rdy_Dtck

Microprocessor Interface

and

Programmable Registers

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