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XRT72L13 Datasheet(PDF) 48 Page - Exar Corporation |
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XRT72L13 Datasheet(HTML) 48 Page - Exar Corporation |
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48 / 370 page ![]() XRT72L13 áç áç áç áç M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC REV. P1.0.6 PRELIMINARY 36 199 RxNib_1/RxOOF O Receive Nibble Output - Bit 1/Receive “Out-Of-Frame” Indicator: The funtion of this output pin depends upon whether the XRT72L13 is operating in the “Clear-Channel-Framing/Nibble-Parallel” Mode or not. Clear-Channel Framing/Nibble-Parallel Mode - Receive Nibble Output - Bit 1: The Framer IC will output "Received data (from the Remote Terminal) to the local Terminal Equipment via this pin along with RxNib0, RxNib2 and RxNib3. The data at this pin is updated on the rising edge of the RxClk output signal. All other Modes - Receiver "Out of Frame" Indicator: The Receive Section of the XRT72L13 M13 Multiplexer/Framer IC will assert this output signal whenever it has declared an "Out of Frame" (OOF) condition with the incoming DS3 frames. This signal is negated when the framer correctly locates the framing alignment bits or bytes and correctly aligns itself with the incoming DS3 frames. 200 GND **** Ground Pin 201 RxNib_0/RxSer O Receive Nibble Output -Bit 0/Receive Serial Output: The funtion of this output pin depends upon whether the XRT72L13 is operating in the “Clear-Channel-Framing/Nibble-Parallel” Mode or in the “Clear-Channel-Framing/Serial” Modes Clear-Channel Framing/Nibble-Parallel Mode - Receive Nibble Output - Bit 0: The Framer IC will output "Received data (from the Remote Terminal) to the local Terminal Equipment via this pin along with RxNib1, RxNib2 and RxNib3. The data at this pin is updated on the rising edge of the RxClk output signal. NOTE: In this case, the RxClk output signal is approximately 11.184MHz Clear-Channel Framing/Serial Mode Receive Serial Output; The Framer IC will output "Received data (from the Remote Terminal) to the local Terminal Equipment via this pin. The data at this pin is updated on the "selected" edge of the RxClk output pin. NOTES: 1. For “Serial-Mode” applications, the “RxClk” output signal is 44.736MHz. 2. If the XRT72L13 is operating in the “Channelized” or “High- Speed HDLC Controller” modes, then this output pin is in- active. 202 RxOutClk O Receive Out Clock - Transmit Terminal Interface Clock for Loop- Timing: This clock signal functions as the "Terminal Interface" clock source, if the XRT72L13 M13 Multiplexer/Framer IC is operating in the "loop- timing" mode. In this mode, the Transmitting Terminal Equipment is expected to input data to the Framer IC, via the TxSer input pin, upon the rising edge of this clock signal. The XRT72L13 will use the rising edge of this clock signal to sample the data at the TxSer input. This clock signal is a buffered version of the RxLineClk signal. PIN DESCRIPTIONS PIN #NAME TYPE DESCRIPTION |
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