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DP8344 Datasheet(PDF) 101 Page - National Semiconductor (TI) |
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DP8344 Datasheet(HTML) 101 Page - National Semiconductor (TI) |
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101 / 184 page ![]() 50 Device Specifications (Continued) TABLE 5-5 Instruction Memory Read Timing (Note 1) Symbol ID Parameter Formula Min Max Units tACC-I 1 Instruction Memory Read Time (nIWa1)TaTLab19 ns tH-IA-I 2 IA Invalid to I Invalid 0 ns tPD-ICLK-IA 3 ICLK Rising to IA Invalid THab13 ns tPD-IA-ICLK 4 Next IA Valid before ICLK Falling TLa b 12 ns tPD-IAz-ICLK IA Invalid before ICLK Falling 17 ns tSU-I-ICLK 5 I Valid before ICLK Rising 20 ns tH-I-ICLK 6 I Invalid before ICLK Falling TLa 0ns Note 1 All parameters are individually tested and guaranteed Interpreting this data by numerically adding two or more parameters to create a new timing specification may lead to invalid results TLF9336 – A9 (a) Instruction Memory Read Timing TLF9336 – 54 (b) Instruction ICLK Timing FIGURE 5-5 Instruction Memory Timing 101 |
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