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DP8344 Datasheet(PDF) 153 Page - National Semiconductor (TI) |
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DP8344 Datasheet(HTML) 153 Page - National Semiconductor (TI) |
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153 / 184 page ![]() 60 Reference Section (Continued) SHR Shift Right Syntax SHR Rsd b register Affected Flags N Z C Description Shifts the contents of the register Rsd b bits to the right and places the result back into that register Zeros are shifted in from the left (ie from the MSB) The value b may specify from 0 to 7 bit shifts The Carry flag contains the last bit shifted out Example Right justify the Address Stack Pointer from the Internal Stack Pointer register ISP R30 MOVE ISP R20 Load ASP from ISP SHR R204 right justify ASP Instruction Format 11001000 Opcode b Rsd 15 7 4 0 T-states 2 Bus Timing Figure 6-1 Operation TLF9336 – 15 SUB Subtract Immediate Syntax SUB n rsd immediate limited register Affected Flags N Z C V Description Subtracts the immediate value n from the register rsd and places the result back into the register rsd Note that only the active registers R0 – R15 may be specified for rsd The value of n is limited to 8 bits (signed range a127 to b 128) Negative numbers are represented using the two’s complement format Example Subtract the constant 3 from register 10 SUB 3 R10 R10 b 3 xR10 Instruction Format 0010 Opcode n rsd 15 11 3 0 T-states 2 Bus Timing Figure 6-1 Operation rsd b n xrsd 153 |
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