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AD9545 Datasheet(PDF) 112 Page - Analog Devices

Part # AD9545
Description  Quad Input, 10-Output, Dual DPLL/IEEE 1588 1 pps Synchronizer and Jitter Cleaner
PDF  157 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9545 Datasheet(HTML) 112 Page - Analog Devices

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AD9545
Data Sheet
Rev. A | Page 112 of 157
USER ACCESS TO TIME STAMPS
USER ACCESS TO TIME STAMPS OVERVIEW
The user can observe time stamps from the various timestamp
sources (see the Timestamps section) via the user timestamp
processor. The AD9545 has two user timestamp processors with
their output results available via the register map as shown in
Figure 88.
The user selects the desired timestamp source via the 5-bit
Timestamp Source x (where x is 0 or 1) bit fields in Bits[D4:D0]
of Register 0x2A12 and Register 0x2A13. Each Timestamp
Source x bit field gives the user access to the 11 timestamp
sources, but with the interconnection constraints per Table 51.
The user timestamp processors work in conjunction with the
auxiliary NCOs in that the user assigns an auxiliary NCO to a
particular user timestamp processor by means of the Timebase
Source x bit (where x is 0 or 1) in Bit D7 of Register 0x2A12 and
Register 0x2A13. Note that either one of the user timestamp
processors can be associated with either one of the auxiliary
NCOs. The user timestamp processor uses elapsed time
information from its assigned auxiliary NCO as the reference
time for reporting user timestamps.
READING USER TIME STAMPS
The user time stamp processors make their time stamp results
available via the Event x time bit fields (where x is 0 or 1) in
Register 0x3A14 to Register 0x3A1D and Register 0x3A20 to
Register 0x3A29. The user must issue an IO_UPDATE
operation prior to reading an Event x time bit field. The
processors perform time stamp conversions as the time stamps
arrive from their prescribed time stamp sources. As such, the
user time stamp processors are event driven. Because of this
event driven process, the user cannot be inherently certain that
a time stamp read from one of the Event x time bit fields is
relevant. There are two methods for mitigating this problem.
The first method is to read the Event x time bit fields
periodically. It is best to read the bit fields at a rate greater than
the expected rate of the time stamp source assigned to the input
of the user time stamp processor. Because consecutive time
stamps arriving from a time source cannot have the same value
by definition, it guarantees that a time stamp reading different
from the last constitutes a new time stamp.
The second method is to use the IRQ feature set of the AD9545
(see the Interrupt Request (IRQ) section). Whenever a user
time stamp processor completes a time stamp conversion, it sets
the corresponding Timestamp x event status bit (where x is 0 or
1) in Bits[D3:D2] of Register 0x300F (assuming the status bit is
unmasked). When the appropriate event occurs, issue an
IO_UPDATE operation and read the appropriate Event x time
bit field (see Figure 88).
The event driven nature of the user time stamp processor means
that the user may miss one or more user time stamps if multiple
time stamps occurred before the user reads one of the Event x
time bit fields. The User Time Stamp x missed count bit fields
(where x is 0 or 1) in Register 0x3A1E and Register 0x3A2A
provide a way for the user to check for any missed input time
stamps. User Time Stamp x missed count = 0 means the current
user time stamp is the latest one in a contiguous series. A
nonzero value in the User Time Stamp x missed count register
means the user missed the indicated number of time stamps
(missed time stamps are lost); therefore, the current time stamp
constitutes the first one in a new series of time stamps.
In operation, the user must issue an IO_UPDATE operation,
which refreshes both the Event x time and User Time Stamp x
missed count bit fields with the most recent time stamp. After
assertion of the IO_UPDATE bit, the user must read both bit
fields simultaneously, because they occupy adjacent address
locations in the register map. Doing so provides for assessing
the status of the User Time Stamp x missed count value, which
is an integral part of capturing the time stamp value. The User
Time Stamp x missed count bit field clears automatically when
read.
Because the user specifies the expected input period for a TDC
via the register map, the TDC knows approximately how much
time must elapse between time stamp events. If an event
happens far outside the expected event period, the TDC flags
the time stamp associated with that event as an error via the
User Time Stamp x low resolution bit (where x is 0 or 1) in
Bit D0 of Register 0x3A1F and Register 0x3A2B. In general, the
user must discard a time stamp when its associated User Time
Stamp x low resolution bit is Logic 1.
There are two categories of user time stamps. The first category
is generic time stamps, which the user reads via the Event x
time bit fields. The second category is time stamps strictly
associated with the internal time scales of the auxiliary NCOs
(see the Auxiliary NCOs section).



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