AD9554 datasheet(108/116 Pages) AD

108 / 116 page

AD9554

Data Sheet

Rev. D | Page 108 of 116

Table 138. EEPROM Storage Sequence for DPLL_2 General Settings

Address

Bits

Bit Name

Description

0x0E3A

[7:0]

DPLL_2 general

settings

The default value of this register is 0x1E, which is a data instruction. Its decimal value is 30, which

tells the controller to transfer 31 bytes of data (30 + 1), beginning at the address specified by the

next two bytes. The controller stores 0x1E in the EEPROM and increments the EEPROM address

pointer.

0x0E3B

[7:0]

The default value of these two registers is 0x0600. This is the starting address of an EEPROM data

transfer because the previous register contains a data instruction that specifies the number of

bytes (minus one) to transfer. The controller stores 0x0600 in the EEPROM and increments the

EEPROM pointer by 2. It then transfers 31 bytes from the register map (beginning at Address 0x0600) to

the external EEPROM and increments the EEPROM address pointer by 31. The 31 bytes transferred

correspond to the DPLL_2 general settings (for example, free running tuning word) in the register map.

0x0E3C

[7:0]

Table 139. EEPROM Storage Sequence for APLL_2 Configuration and Output Drivers

Address

Bits

Bit Name

Description

0x0E3D

[7:0]

APLL_2 config

and output

drivers

The default value of this register is 0x0E, which is a data instruction. Its decimal value is 14, which

tells the controller to transfer 15 bytes of data (14 + 1) beginning at the address specified by the

next two bytes. The controller stores 0x0E in the EEPROM and increments the EEPROM address

pointer.

0x0E3E

[7:0]

The default value of these two registers is 0x0630. This is the starting address of an EEPROM data

transfer because the previous register contains a data instruction that specifies the number of

bytes (minus one) to transfer. The controller stores 0x0630 in the EEPROM and increments the

EEPROM pointer by 2. It then transfers 31 bytes from the register map (beginning at Address 0x0630) to

the external EEPROM and increments the EEPROM address pointer by 31. The 31 bytes transferred

correspond to the APLL_2 settings as well as the PLL_2 output driver settings in the register map.

0x0E3F

[7:0]

Table 140. EEPROM Storage Sequence for PLL_2 Dividers and Bandwidth Settings

Address

Bits

Bit Name

Description

0x0E40

[7:0]

DPLL_2 dividers

and BW

The default value of this register is 0x33, which is a data instruction. Its decimal value is 51, which

tells the controller to transfer 52 bytes of data (51 + 1), beginning at the address specified by the

next two bytes. The controller stores 0x33 in the EEPROM and increments the EEPROM address

pointer.

0x0E41

[7:0]

The default value of these two registers is 0x0640. This is the starting address of an EEPROM data

transfer because the previous register contains a data instruction that specifies the number of

bytes (minus one) to transfer. The controller stores 0x0640 in the EEPROM and increments the

EEPROM pointer by 2. It then transfers 52 bytes from the register map (beginning at Address 0x0640) to

the external EEPROM and increments the EEPROM address pointer by 52. The 52 bytes transferred

correspond to the DPLL_2 feedback dividers and loop bandwidth settings in the register map.

0x0E42

[7:0]

Table 141. EEPROM Storage Sequence for DPLL_3 General Settings

Address

Bits

Bit Name

Description

0x0E43

[7:0]

DPLL_3 general

settings

The default value of this register is 0x1E, which is a data instruction. Its decimal value is 30, which

tells the controller to transfer 31 bytes of data (30 + 1), beginning at the address specified by the

next two bytes. The controller stores 0x1E in the EEPROM and increments the EEPROM address

pointer.

0x0E44

[7:0]

The default value of these two registers is 0x0700. This is the starting address of an EEPROM data

transfer because the previous register contains a data instruction that specifies the number of

bytes (minus one) to transfer. The controller stores 0x0700 in the EEPROM and increments the

EEPROM pointer by 2. It then transfers 31 bytes from the register map (beginning at Address 0x0700) to

the external EEPROM and increments the EEPROM address pointer by 31. The 31 bytes transferred

correspond to the DPLL_3 general settings (for example, free running tuning word) in the register map.

0x0E45

[7:0]

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