AD9554 datasheet(110/116 Pages) AD

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AD9554

Data Sheet

Rev. D | Page 110 of 116

Table 146. EEPROM Storage Sequence for PLL_0 Operational Control Settings

Address

Bits

Bit Name

Description

0x0E52

[7:0]

PLL_0

operational

controls

The default value of this register is 0x04, which is a data instruction. Its decimal value is 4, which

tells the controller to transfer five bytes of data (4 + 1), beginning at the address specified by the

next two bytes. The controller stores 0x04 in the EEPROM and increments the EEPROM address

pointer.

0x0E53

[7:0]

The default value of these two registers is 0x0A20. This is the starting address of an EEPROM data

transfer because the previous register contains a data instruction that specifies the number of

bytes (minus one) to transfer. The controller stores 0x0A20 in the EEPROM and increments the

EEPROM pointer by 2. It then transfers five bytes from the register map (beginning at Address 0x0A20) to

the external EEPROM and increments the EEPROM address pointer by five. The five bytes

transferred correspond to the PLL_0 operational controls in the register map.

0x0E54

[7:0]

Table 147. EEPROM Storage Sequence for PLL_1 Operational Control Settings

Address

Bits

Bit Name

Description

0x0E55

[7:0]

PLL_1

operational

controls

The default value of this register is 0x04, which is a data instruction. Its decimal value is 4, which

tells the controller to transfer five bytes of data (4 + 1), beginning at the address specified by the

next two bytes. The controller stores 0x04 in the EEPROM and increments the EEPROM address

pointer.

0x0E56

[7:0]

The default value of these two registers is 0x0A40. This is the starting address of an EEPROM data

transfer because the previous register contains a data instruction that specifies the number of

bytes (minus one) to transfer. The controller stores 0x0A40 in the EEPROM and increments the

EEPROM pointer by 2. It then transfers five bytes from the register map (beginning at Address 0x0A40) to

the external EEPROM and increments the EEPROM address pointer by five. The five bytes

transferred correspond to the PLL_1 operational controls in the register map.

0x0E57

[7:0]

Table 148. EEPROM Storage Sequence for PLL_2 Operational Control Settings

Address

Bits

Bit Name

Description

0x0E58

[7:0]

PLL_2

operational

controls

The default value of this register is 0x04, which is a data instruction. Its decimal value is 4, which

tells the controller to transfer five bytes of data (4 + 1), beginning at the address specified by the

next two bytes. The controller stores 0x04 in the EEPROM and increments the EEPROM address

pointer.

0x0E59

[7:0]

The default value of these two registers is 0x0A60. This is the starting address of an EEPROM data

transfer because the previous register contains a data instruction that specifies the number of

bytes (minus one) to transfer. The controller stores 0x0A60 in the EEPROM and increments the

EEPROM pointer by 2. It then transfers five bytes from the register map (beginning at Address 0x0A60) to

the external EEPROM and increments the EEPROM address pointer by five. The five bytes

transferred correspond to the PLL_2 operational controls in the register map.

0x0E5A

[7:0]

Table 149. EEPROM Storage Sequence for PLL_3 Operational Control Settings

Address

Bits

Bit Name

Description

0x0E5B

[7:0]

PLL_3

operational

controls

The default value of this register is 0x04, which is a data instruction. Its decimal value is 4, which

tells the controller to transfer five bytes of data (4 + 1), beginning at the address specified by the

next two bytes. The controller stores 0x04 in the EEPROM and increments the EEPROM address

pointer.

0x0E5C

[7:0]

The default value of these two registers is 0x0A80. This is the starting address of an EEPROM data

transfer because the previous register contains a data instruction that specifies the number of

bytes (minus one) to transfer. The controller stores 0x0A80 in the EEPROM and increments the

EEPROM pointer by 2. It then transfers five bytes from the register map (beginning at Address 0x0A80) to

the external EEPROM and increments the EEPROM address pointer by five. The five bytes

transferred correspond to the PLL_3 operational controls in the register map.

0x0E5D

[7:0]

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