AD9554 datasheet(109/116 Pages) AD

109 / 116 page

Data Sheet

AD9554

Rev. D | Page 109 of 116

Table 142. EEPROM Storage Sequence for APLL_3 Configuration and Output Drivers

Address

Bits

Bit Name

Description

0x0E46

[7:0]

APLL_3 config

and output

drivers

The default value of this register is 0x0E, which is a data instruction. Its decimal value is 14, which

tells the controller to transfer 15 bytes of data (14 + 1) beginning at the address specified by the

next two bytes. The controller stores 0x0E in the EEPROM and increments the EEPROM address

pointer.

0x0E47

[7:0]

The default value of these two registers is 0x0730. This is the starting address of an EEPROM data

transfer because the previous register contains a data instruction that specifies the number of

bytes (minus one) to transfer. The controller stores 0x0730 in the EEPROM and increments the

EEPROM pointer by 2. It then transfers 31 bytes from the register map (beginning at Address 0x0730) to

the external EEPROM and increments the EEPROM address pointer by 31. The 31 bytes transferred

correspond to the APLL_3 settings as well as the PLL_3 output driver settings in the register map.

0x0E48

[7:0]

Table 143. EEPROM Storage Sequence for PLL_3 Dividers and Bandwidth Settings

Address

Bits

Bit Name

Description

0x0E49

[7:0]

DPLL_3 dividers

and BW

The default value of this register is 0x33, which is a data instruction. Its decimal value is 52, which

tells the controller to transfer 53 bytes of data (52 + 1), beginning at the address specified by the

next two bytes. The controller stores 0x33 in the EEPROM and increments the EEPROM address

pointer.

0x0E4A

[7:0]

The default value of these two registers is 0x0740. This is the starting address of an EEPROM data

transfer because the previous register contains a data instruction that specifies the number of

bytes (minus one) to transfer. The controller stores 0x0740 in the EEPROM and increments the

EEPROM pointer by 2. It then transfers 52 bytes from the register map (beginning at Address 0x0740) to

the external EEPROM and increments the EEPROM address pointer by 52. The 52 bytes transferred

correspond to the DPLL_3 feedback dividers and loop bandwidth settings in the register map.

0x0E4B

[7:0]

Table 144. EEPROM Storage Sequence for Loop Filter Settings

Address

Bits

Bit Name

Description

0x0E4C

[7:0]

DPLL loop filters

The default value of this register is 0x17, which is a data instruction. Its decimal value is 23, which

tells the controller to transfer 24 bytes of data (23 + 1), beginning at the address specified by the

next two bytes. The controller stores 0x17 in the EEPROM and increments the EEPROM address

pointer.

0x0E4D

[7:0]

The default value of these two registers is 0x0800. This is the starting address of an EEPROM data

transfer because the previous register contains a data instruction that specifies the number of

bytes (minus one) to transfer. The controller stores 0x0800 in the EEPROM and increments the

EEPROM pointer by 2. It then transfers 24 bytes from the register map (beginning at Address 0x0800) to

the external EEPROM and increments the EEPROM address pointer by 24. The 24 bytes transferred

are the digital loop filter settings in the register map.

0x0E4E

[7:0]

Table 145. EEPROM Storage Sequence for Operational Control Common Settings

Address

Bits

Bit Name

Description

0x0E4F

[7:0]

Operational

controls

(common)

The default value of this register is 0x14, which is a data instruction. Its decimal value is 20, which

tells the controller to transfer 21 bytes of data (20 + 1), beginning at the address specified by the

next two bytes. The controller stores 0x0E in the EEPROM and increments the EEPROM address

pointer.

0x0E50

[7:0]

The default value of these two registers is 0x0A00. This is the starting address of an EEPROM data

transfer because the previous register contains a data instruction that specifies the number of

bytes (minus one) to transfer. The controller stores 0x0A00 in the EEPROM and increments the

EEPROM pointer by 2. It then transfers 21 bytes from the register map (beginning at Address 0x0A00) to

the external EEPROM and increments the EEPROM address pointer by 21. The 21 bytes transferred

correspond to the common operational controls in the register map.

0x0E51

[7:0]

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