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8101 Datasheet(PDF) 110 Page - LSI Computer Systems

Part # 8101
Description  Gigabit Ethernet Controller
PDF  172 Pages
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Manufacturer  LSI [LSI Computer Systems]
Direct Link  http://www.lsicsi.com
Logo LSI - LSI Computer Systems

8101 Datasheet(HTML) 110 Page - LSI Computer Systems

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4-22
Registers
Copyright © 2000–2001 by LSI Logic Corporation. All rights reserved.
FCNTRL_DIS FCNTRL Pin
1, R/W
SD_EN
Signal Detect Pin Enable
0, R/W
4.3.11 Register 10–Configuration 4
Note:
ENDIAN 15-bit occurs on the REGD15 pin
ENDIAN
Endian Select
15, R/W
BUSSIZE
Bus Size Word Width
14, R/W
RES
Reserved
13, [9:8], [5:0], R/W
Must be left at default value or written to 0 for proper
device operation.
LPBK
Loopback Enable
12, R/W
FCNTRL_DIS Description
1
FCNTRL pin disabled (does not cause
autogenerated pause frame transmission).
0
Enabled
SD_EN
Description
1
Enabled
0
SD pin disabled, i.e., internal SD always asserted,
does not affect receive word synchronization
15
14
13
12
11
10
9
8
7
6
5
0
ENDIAN BUSSIZE
RES
LPBK
LNKDN
TBC_DIS
RES
CMXPKT1 CMXPKT0
RES
ENDIAN
Description
1
RXD/TXD data in big endian format
0
RXD/TXD data in little endian format
BUSSIZE
Description
1
Receive system bus word width is 16 bits
0
Receive system bus word width is 32 bits
LPBK
Description
1
Loopback mode enabled
0
Normal



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