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8101 Datasheet(PDF) 111 Page - LSI Computer Systems |
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8101 Datasheet(HTML) 111 Page - LSI Computer Systems |
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111 / 172 page ![]() Register Definitions 4-23 Copyright © 2000–2001 by LSI Logic Corporation. All rights reserved. LNKDN Link Down FIFO Flush Enable 11, R/W TBC_DIS TX Disable 10, R/W RES Reserved [9:8], [5:0] R/W Must be left at default value or written to 0 for proper device operation. CMXPKT[1:0] Counter Max Packet Size Select [7:6], R/W 4.3.12 Register 11–Status 1 Note: RSYNC 15-bit occurs on the REGD15 pin RSYNC Receive Word Synchronization Detect 15, R/LTI RES Reserved [14:13], [10:8], [2:0] Must be left at default value or written to 0 for proper device operation. LNKDN Description 1 When receive link is down, data exiting the TX FIFO is discarded 0 Normal TBC_DIS Description 1 TBC, TX [9:0] outputs disabled (high impedance) 0 Enabled CMXPKT[1:0] Description 11 Unlimited 10 1535 bytes 01 1522 bytes 00 1518 bytes 15 14 13 12 11 10 8 7 6 5 4 3 2 0 RSYNC RES SD LINK RES AN_NP AN_TX_NP AN_RX_NP AN_RX_BP AN_RMTRST RES RSYNC Description 1 Receive 8B10B PCS has acquired word synchronization 0 Not synchronized |
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