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8101 Datasheet(PDF) 114 Page - LSI Computer Systems |
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8101 Datasheet(HTML) 114 Page - LSI Computer Systems |
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114 / 172 page ![]() 4-26 Registers Copyright © 2000–2001 by LSI Logic Corporation. All rights reserved. 4.3.14 Register 17–Transmit FIFO Threshold Note: TWM1[4] 15-bit occurs on the REGD15 pin TWM1[4:0] Transmit FIFO Watermark 1 Threshold [15:11], R/W TWM2[4:0] Transmit FIFO Watermark 2 Threshold [10:6], R/W 15 11 10 6 5 0 TWM1[4:0] TWM2[4:0] TASND[5:0] TWM1[4:0] Description Range 0 −1024 words (0−4096 bytes) Increment 32 words (128 bytes) 11111 Reserved, do not use 11110 992 words in FIFO (3968 bytes) 11101 960 words in FIFO (3840 bytes 00001 64 words in FIFO (256 bytes) 00000 32 words in FIFO (128 bytes) TWM2[4:0] Description Range 0 −1024 words (0−4096 bytes) Increment 32 words (128 bytes) 11111 Reserved, do not use 11110 992 words in FIFO (3968 bytes) 11101 960 words in FIFO (3840 bytes) 00001 64 words in FIFO (256 bytes) 00000 32 words in FIFO (128 bytes) |
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