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TC35680FSG Datasheet(PDF) 79 Page - Toshiba Semiconductor |
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TC35680FSG Datasheet(HTML) 79 Page - Toshiba Semiconductor |
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79 / 91 page  TC35680FSG-002/TC35681FSG-002 79 2019-04-04 SPI Interface Table 5-13 AC characteristics of SPI interface Symbol Item Min. Typ. Max. Unit tSPICLKCYC SPI clock cycle 125 — — ns tSPICLKHPW SPI clock High pulse width 62 — — ns tSPICLKLPW SPI clock Low pulse width 62 — — ns tSPICSS SPI chip select setup time 31 — — ns tSPICSH SPI chip select hold time 62 — — ns tSPIIW SPI transfer idle pulse width 62 — — ns tSPIAS SPI address setup time 31 — — ns tSPIAH SPI address hold time 62 — — ns tSPIDS SPI data setup time 31 — — ns tSPIDH SPI data hold time 62 — — ns Figure 5-4 Timing chart of SPI interface SCLK ｔSPICSS ｔSPIAS ｔSPIAH A7 ｔSPICSH A6 A5 A4 WR A0 D15 D14 D1 D0 A7 A6 SCS DOUT Write ｔSPICLKHPW ｔSPICLKLPW ｔSPIDS ｔSPIDH ｔSPIIW SCLK ｔSPICSS ｔSPIAS ｔSPIAH A7 ｔSPICSH A6 A5 A4 WR A0 D15 A7 A6 SCS DIN Read ｔSPICLKHPW ｔSPICLKLPW ｔSPIDS ｔSPIDH ｔSPIIW ｔSPICLKCYC ｔSPICLKCYC D14 D0 D1 |
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