C200 datasheet(74/82 Pages) INTEL

74 / 82 page

Documentation Changes

Specification Update

f. The following sentence in section 5.21.3.6 Temperature Comparator and Alert:

In general the TEMP_ALERT# signal will assert within a 1–4 seconds, depending on the

actual BIOS implementation and flow.

is changed to:

In general the TEMP_ALERT# signal will assert within 1–4 seconds, depending on the

actual BIOS implementation and flow.

g. Section 5.21.3.8.2 title is changed from Power On to Block Read Special Handling

h. Note 1 is added to PWM[3:0] in table 8-9 DC Characteristic Output Signal

Association.

26.

PCI Express* Initialization Registers Corrections

19.1.62 PECR2 — PCI Express* Configuration Register 2 and 19.1.64 PEC1 — PCI

Express Configuration Register 1 are removed from the Datasheet. No BIOS

programming is required.

27.

VccSus3_3 Description

The description for VccSus3_3 in table 2-26 is changed as shown:

28.

The following table lists the correct default value for the given register at the location of

the incorrect value.

Name

Description

VccSus3_3

3.3 V supply for suspend well I/O buffers. This power may be shut off in the

Deep S4/S5 or G3 states.

Location of Incorrect

Default Value

Correct Default Value

USBOCM1

Table 10-1

C0300C03h

BIOS_CNTL

Table 13-1

20h

CAP

Table 15-1

70h

EHCIIR1

Section 16.1.31

83088E01h

XCAP

Table 19-1

0042h

DCAP

Table 19-1

00008000h

SLCAP

Table 19-1

00040060h

CEM

Table 19-1

00002000h

SSFC

Table 21-1

F80000h

FRAP

Table 21-2

00000088h

Table 23-1

078000h

Table 23-3

078000h

HTYPE

Table 23-1

80h

HTYPE

Table 23-3

80h

HERES

Section 23.1.1.26

40000000h

HERES

Section 23.2.1.25

40000000h

ME_CB_RW

Table 23-2

FFFFFFFFh

ME_CB_RW

Table 23-4

FFFFFFFFh

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