C200 datasheet(43/82 Pages) INTEL

43 / 82 page

Specification Update

Documentation Changes

Addition of LPC Capability List Pointer Register

The following is added immediately after 13.1.11:

CAPP – Capability List Pointer Register (LPC I/F—D31:F0)

Offset Address: 34h

Attribute:

Default Value:

E0h

Size:

8 bits

Intel® Smart Response Technology Functional Description Updates

The following replaces section 5.16.8:

Part of the Intel® RST storage class driver feature set, Intel® Smart Response

Technology implements storage I/O caching to provide users with faster response times

for things like system boot and application startup. On a traditional system,

performance of these operations is limited by the hard drive, particularly when there

may be other I/O intensive background activities running simultaneously, like system

updates or virus scans. Intel Smart Response Technology accelerates the system

response experience by putting frequently-used blocks of disk data on an SSD,

providing dramatically faster access to user data than the hard disk alone can provide.

The user sees the full capacity of the hard drive with the traditional single drive letter

with overall system responsiveness similar to what an SSD-only system provides.

See Section 1.3 for SKUs enabled for Intel Smart Response Technology.

Addition of Legacy ATA Backwards Compatibility Registers

a. Section 14.1.22 IDE_TIM — IDE Timing Register is modified as shown:

Bit

Description

7:0

Capability Pointer (CP) — RO. Indicates the offset of the first Capability

Item.

Bit

Description

IDE Decode Enable (IDE) — R/W. Individually enable/disable the Primary or

Secondary decode.

0 = Disable.

1 = Enables the PCH to decode the associated Command Block (1F0–1F7h for primary,

170–177h for secondary, or their native mode BAR equivalents) and Control Block

(3F6h for primary, 376h for secondary, or their native mode BAR equivalents).

This bit effects the IDE decode ranges for both legacy and native-mode decoding.

C200 Datasheet(PDF) 43 Page - Intel Corporation